发布求助
文献互助 智能选刊 最新文献

International Workshop on Power and Timing Modeling, Optimization and Simulation最新文献

筛选
英文 中文
Transistor-Level Gate Modeling for Nano CMOS Circuit Verification Considering Statistical Process Variations 考虑统计工艺变化的纳米CMOS电路验证晶体管级栅极建模
International Workshop on Power and Timing Modeling, Optimization and Simulation Pub Date : 2010-09-07 DOI: 10.1007/978-3-642-17752-1_19
Qin Tang, A. Zjajo, Michel Berkelaar, N. V. D. Meijs
{"title":"Transistor-Level Gate Modeling for Nano CMOS Circuit Verification Considering Statistical Process Variations","authors":"Qin Tang, A. Zjajo, Michel Berkelaar, N. V. D. Meijs","doi":"10.1007/978-3-642-17752-1_19","DOIUrl":"https://doi.org/10.1007/978-3-642-17752-1_19","url":null,"abstract":"","PeriodicalId":428747,"journal":{"name":"International Workshop on Power and Timing Modeling, Optimization and Simulation","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131418805","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Optimizing and Comparing CMOS Implementations of the C-Element in 65nm Technology: Self-Timed Ring Case C-Element在65nm工艺下的CMOS实现优化与比较:自定时环案例
International Workshop on Power and Timing Modeling, Optimization and Simulation Pub Date : 2010-09-07 DOI: 10.1007/978-3-642-17752-1_14
Oussama Elissati, E. Yahya, Sébastien Rieubon, L. Fesquet
{"title":"Optimizing and Comparing CMOS Implementations of the C-Element in 65nm Technology: Self-Timed Ring Case","authors":"Oussama Elissati, E. Yahya, Sébastien Rieubon, L. Fesquet","doi":"10.1007/978-3-642-17752-1_14","DOIUrl":"https://doi.org/10.1007/978-3-642-17752-1_14","url":null,"abstract":"","PeriodicalId":428747,"journal":{"name":"International Workshop on Power and Timing Modeling, Optimization and Simulation","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131882198","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
OPENTLM and SOCKET: Creating an Open EcoSystem for Virtual Prototyping of Complex SOCs OPENTLM和SOCKET:为复杂soc的虚拟原型创建一个开放生态系统
International Workshop on Power and Timing Modeling, Optimization and Simulation Pub Date : 2010-09-07 DOI: 10.1007/978-3-642-17752-1_29
L. Maillet-Contoz
{"title":"OPENTLM and SOCKET: Creating an Open EcoSystem for Virtual Prototyping of Complex SOCs","authors":"L. Maillet-Contoz","doi":"10.1007/978-3-642-17752-1_29","DOIUrl":"https://doi.org/10.1007/978-3-642-17752-1_29","url":null,"abstract":"","PeriodicalId":428747,"journal":{"name":"International Workshop on Power and Timing Modeling, Optimization and Simulation","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132634892","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Power Profiling of Embedded Analog/Mixed-Signal Systems 嵌入式模拟/混合信号系统的功率分析
International Workshop on Power and Timing Modeling, Optimization and Simulation Pub Date : 2010-09-07 DOI: 10.1007/978-3-642-17752-1_25
Jan Haase, C. Grimm
{"title":"Power Profiling of Embedded Analog/Mixed-Signal Systems","authors":"Jan Haase, C. Grimm","doi":"10.1007/978-3-642-17752-1_25","DOIUrl":"https://doi.org/10.1007/978-3-642-17752-1_25","url":null,"abstract":"","PeriodicalId":428747,"journal":{"name":"International Workshop on Power and Timing Modeling, Optimization and Simulation","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132507156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Signing Off Industrial Designs on Evolving Technologies 根据不断发展的技术签署工业设计
International Workshop on Power and Timing Modeling, Optimization and Simulation Pub Date : 2010-09-07 DOI: 10.1007/978-3-642-17752-1_32
Sébastien Marchal
{"title":"Signing Off Industrial Designs on Evolving Technologies","authors":"Sébastien Marchal","doi":"10.1007/978-3-642-17752-1_32","DOIUrl":"https://doi.org/10.1007/978-3-642-17752-1_32","url":null,"abstract":"","PeriodicalId":428747,"journal":{"name":"International Workshop on Power and Timing Modeling, Optimization and Simulation","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126784001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Clock Network Synthesis with Concurrent Gate Insertion 具有并发门插入的时钟网络合成
International Workshop on Power and Timing Modeling, Optimization and Simulation Pub Date : 2010-09-07 DOI: 10.1007/978-3-642-17752-1_23
Jingwei Lu, Wing-Kai Chow, Chiu-Wing Sham
{"title":"Clock Network Synthesis with Concurrent Gate Insertion","authors":"Jingwei Lu, Wing-Kai Chow, Chiu-Wing Sham","doi":"10.1007/978-3-642-17752-1_23","DOIUrl":"https://doi.org/10.1007/978-3-642-17752-1_23","url":null,"abstract":"","PeriodicalId":428747,"journal":{"name":"International Workshop on Power and Timing Modeling, Optimization and Simulation","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130855314","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Physical Design Aware Comparison of Flip-Flops for High-Speed Energy-Efficient VLSI Circuits 高速节能VLSI电路中触发器的物理设计感知比较
International Workshop on Power and Timing Modeling, Optimization and Simulation Pub Date : 2010-09-07 DOI: 10.1007/978-3-642-17752-1_7
M. Alioto, Elio Consoli, G. Palumbo
{"title":"Physical Design Aware Comparison of Flip-Flops for High-Speed Energy-Efficient VLSI Circuits","authors":"M. Alioto, Elio Consoli, G. Palumbo","doi":"10.1007/978-3-642-17752-1_7","DOIUrl":"https://doi.org/10.1007/978-3-642-17752-1_7","url":null,"abstract":"","PeriodicalId":428747,"journal":{"name":"International Workshop on Power and Timing Modeling, Optimization and Simulation","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126191983","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
On Line Power Optimization of Data Flow Multi-core Architecture Based on Vdd-Hopping for Local DVFS 基于vdd跳频的本地DVFS数据流多核架构在线功率优化
International Workshop on Power and Timing Modeling, Optimization and Simulation Pub Date : 2010-09-07 DOI: 10.1007/978-3-642-17752-1_10
P. Vivet, E. Beigné, H. Lebreton, N. Zergainoh
{"title":"On Line Power Optimization of Data Flow Multi-core Architecture Based on Vdd-Hopping for Local DVFS","authors":"P. Vivet, E. Beigné, H. Lebreton, N. Zergainoh","doi":"10.1007/978-3-642-17752-1_10","DOIUrl":"https://doi.org/10.1007/978-3-642-17752-1_10","url":null,"abstract":"","PeriodicalId":428747,"journal":{"name":"International Workshop on Power and Timing Modeling, Optimization and Simulation","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125407742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
An All-Digital Phase-Locked Loop with High Resolution for Local On-Chip Clock Synthesis 一种用于片上时钟合成的高分辨率全数字锁相环
International Workshop on Power and Timing Modeling, Optimization and Simulation Pub Date : 2010-09-07 DOI: 10.1007/978-3-642-17752-1_22
O. Schrape, F. Winkler, Steffen Zeidler, Markus Petri, E. Grass, U. Jagdhold
{"title":"An All-Digital Phase-Locked Loop with High Resolution for Local On-Chip Clock Synthesis","authors":"O. Schrape, F. Winkler, Steffen Zeidler, Markus Petri, E. Grass, U. Jagdhold","doi":"10.1007/978-3-642-17752-1_22","DOIUrl":"https://doi.org/10.1007/978-3-642-17752-1_22","url":null,"abstract":"","PeriodicalId":428747,"journal":{"name":"International Workshop on Power and Timing Modeling, Optimization and Simulation","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126577360","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Temperature-Aware Time-Dependent Dielectric Breakdown Analysis Framework 一种温度敏感、时变介电击穿分析框架
International Workshop on Power and Timing Modeling, Optimization and Simulation Pub Date : 2010-09-07 DOI: 10.1007/978-3-642-17752-1_8
D. Bekiaris, A. Papanikolaou, C. Papameletis, D. Soudris, G. Economakos, K. Pekmestzi
{"title":"A Temperature-Aware Time-Dependent Dielectric Breakdown Analysis Framework","authors":"D. Bekiaris, A. Papanikolaou, C. Papameletis, D. Soudris, G. Economakos, K. Pekmestzi","doi":"10.1007/978-3-642-17752-1_8","DOIUrl":"https://doi.org/10.1007/978-3-642-17752-1_8","url":null,"abstract":"","PeriodicalId":428747,"journal":{"name":"International Workshop on Power and Timing Modeling, Optimization and Simulation","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124550312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信