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Optimizing and Comparing CMOS Implementations of the C-Element in 65nm Technology: Self-Timed Ring Case

International Workshop on Power and Timing Modeling, Optimization and Simulation Pub Date : 2010-09-07 DOI:10.1007/978-3-642-17752-1_14
Oussama Elissati, E. Yahya, Sébastien Rieubon, L. Fesquet
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C-Element在65nm工艺下的CMOS实现优化与比较:自定时环案例
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International Workshop on Power and Timing Modeling, Optimization and Simulation
International Workshop on Power and Timing Modeling, Optimization and Simulation
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