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Writing P4 compiler backend for packet processing engines 为包处理引擎编写P4编译器后端
Proceedings of the Symposium on Architectures for Networking and Communications Systems Pub Date : 2021-12-13 DOI: 10.1145/3493425.3502769
Balachandher Sambasivam, Maheswari Subramanian, Debapriya Chatterjee, Mallikarjuna Gouda, Sosutha Sethuramapandian, Yogender Singh Saroha
{"title":"Writing P4 compiler backend for packet processing engines","authors":"Balachandher Sambasivam, Maheswari Subramanian, Debapriya Chatterjee, Mallikarjuna Gouda, Sosutha Sethuramapandian, Yogender Singh Saroha","doi":"10.1145/3493425.3502769","DOIUrl":"https://doi.org/10.1145/3493425.3502769","url":null,"abstract":"The advent of P4 as a protocol-independent and platform-independent network packet processing language has revolutionized the way networks are designed and the way networking devices are programmed. There are few programmable devices, whether ASICs or FPGA-based devices, that are designed with P4 programmability as the end goal right from the beginning. As a consequence, although these packet processing engines are programmable, writing a P4 compiler for these targets requires overcoming some technical challenges. Our team has worked on a variety of packet processing pipelines in recent years, in this article, we are presenting some of these challenges as well as the solutions we found to work around them.","PeriodicalId":426581,"journal":{"name":"Proceedings of the Symposium on Architectures for Networking and Communications Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126589588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Invenio
Proceedings of the Symposium on Architectures for Networking and Communications Systems Pub Date : 2021-12-13 DOI: 10.1145/3493425.3502750
Amit Sheoran, S. Fahmy, P. Sharma, Navin Modi
{"title":"Invenio","authors":"Amit Sheoran, S. Fahmy, P. Sharma, Navin Modi","doi":"10.1145/3493425.3502750","DOIUrl":"https://doi.org/10.1145/3493425.3502750","url":null,"abstract":"Microservices enable rapid service deployment and scaling. Integrating poorly-understood microservice components into Service Function Chains (SFCs) or graphs limits a provider's control over service delivery latency, however. Orchestration frameworks currently instantiate and place myriads of microservice components without knowing the impact of placement decisions on latency. In this paper, we explore challenges that service providers encounter in managing complex SFCs, and propose Invenio to empower providers to effectively place microservices without prior knowledge of service functionality. Invenio correlates user actions with procedure messages in network traces, and computes procedural affinity of communication among microservices for each user action. The procedural affinity values can then be used to make placement decisions to meet latency constraints of individual user actions. Our experiments with two microservice-based cellular network implementations demonstrate that placement with Invenio-computed affinity values significantly reduces failures by bounding message processing latency, resulting in up to 21% performance gain compared to message count-based placement algorithms, and up to 51% gain over default placement.","PeriodicalId":426581,"journal":{"name":"Proceedings of the Symposium on Architectures for Networking and Communications Systems","volume":"54 11","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121011824","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Framework for Reproducible Data Plane Performance Modeling 可再现数据平面性能建模框架
Proceedings of the Symposium on Architectures for Networking and Communications Systems Pub Date : 2021-12-13 DOI: 10.1145/3493425.3502756
D. Scholz, Hasanin Harkous, Sebastian Gallenmüller, Henning Stubbe, Max Helm, Benedikt Jaeger, N. Deric, Endri Goshi, Zikai Zhou, W. Kellerer, G. Carle
{"title":"A Framework for Reproducible Data Plane Performance Modeling","authors":"D. Scholz, Hasanin Harkous, Sebastian Gallenmüller, Henning Stubbe, Max Helm, Benedikt Jaeger, N. Deric, Endri Goshi, Zikai Zhou, W. Kellerer, G. Carle","doi":"10.1145/3493425.3502756","DOIUrl":"https://doi.org/10.1145/3493425.3502756","url":null,"abstract":"Languages for programming data planes like P4 sparked a plethora of new applications in the data plane. The dynamic, evolving environment makes it challenging to understand what performance can be expected when running a program in a specific data plane target. However, knowing this is crucial for network operators when upgrading their networks. We present a framework for the reproducible analysis and modeling of P4 program components. By defining and generating precise specifications of the experiments, we separate fully auto-generated components from testbed- or target-specific parts. Measurement results are used to derive performance models automatically. These can then be used to compare the measured with the theoretical performance, or to model the cost of entire paths through the data plane. In two case studies, we use our framework to discover and model selected behavior for a DPDK-based software target and for the NFP-4000 SmartNIC platform.","PeriodicalId":426581,"journal":{"name":"Proceedings of the Symposium on Architectures for Networking and Communications Systems","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124753961","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Achieving End-to-End Network Visibility with Host-INT 通过Host-INT实现端到端网络可见性
Proceedings of the Symposium on Architectures for Networking and Communications Systems Pub Date : 2021-12-13 DOI: 10.1145/3493425.3502764
Tomasz Osiński, C. Cascone
{"title":"Achieving End-to-End Network Visibility with Host-INT","authors":"Tomasz Osiński, C. Cascone","doi":"10.1145/3493425.3502764","DOIUrl":"https://doi.org/10.1145/3493425.3502764","url":null,"abstract":"So far, the In-Band Network Telemetry (INT) standard has been implemented mainly on P4 programmable switches. Observing packets as they travel through switches is knowing only half of the story. In this poster, we present the work in progress on Host-INT, an open-source solution based on eBPF and integrated with Kubernetes that extends INT support to the Linux network stack. When coupled with a P4-based Switch-INT implementation, Host-INT enables end-to-end network visibility.","PeriodicalId":426581,"journal":{"name":"Proceedings of the Symposium on Architectures for Networking and Communications Systems","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128042223","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Enhancements for Hardware-based IEEE802.1CB embedded in Automotive Gateway System-on-Chip 在汽车网关片上系统中嵌入基于硬件的IEEE802.1CB的增强
Proceedings of the Symposium on Architectures for Networking and Communications Systems Pub Date : 2021-12-13 DOI: 10.1145/3493425.3502754
Angela Gonzalez Mariño, A. Kane, F. Fons, J. M. Aróstegui
{"title":"Enhancements for Hardware-based IEEE802.1CB embedded in Automotive Gateway System-on-Chip","authors":"Angela Gonzalez Mariño, A. Kane, F. Fons, J. M. Aróstegui","doi":"10.1145/3493425.3502754","DOIUrl":"https://doi.org/10.1145/3493425.3502754","url":null,"abstract":"In this work, authors present a Hardware based strategy for IEEE802.1CB Network Reliability embedded in Automotive Gateways (GW). It is a new approach for HW efficient and cost-effective integration of Frame Replication and Elimination for Reliability (FRER) algorithm within automotive Network-on-Chip / System-on-Chip. In essence, it is a HW architecture that permits to manage the complex integration of IEEE802.1CB within In-Vehicle Networks. The FRER algorithm is split into smaller functionalities which are allocated across the different processing stages of the GW, maximizing device and network performance. The proposed architecture has a strong focus on Functional Safety, introducing important enhancements to overcome IEEE802.1CB limitations identified in the state of the art: data content verification, meaningful network diagnosability and performance verification. It moves a step forward towards fail operational systems and the compliance with ISO 26262, contributing to future autonomous driving networking solutions.","PeriodicalId":426581,"journal":{"name":"Proceedings of the Symposium on Architectures for Networking and Communications Systems","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126308948","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
No-hop: In-network Distributed Hash Tables No-hop:网络内分布式哈希表
Proceedings of the Symposium on Architectures for Networking and Communications Systems Pub Date : 2021-12-13 DOI: 10.1145/3493425.3502757
Lily Hügerich, Apoorv Shukla, Georgios Smaragdakis
{"title":"No-hop: In-network Distributed Hash Tables","authors":"Lily Hügerich, Apoorv Shukla, Georgios Smaragdakis","doi":"10.1145/3493425.3502757","DOIUrl":"https://doi.org/10.1145/3493425.3502757","url":null,"abstract":"We make a case for a distributed hash table lookup in the network data plane. We argue that the lookup time performance of distributed hash tables can be further improved via an in-network data plane implementation. To this end, we introduce No-hop, an in-network distributed hash table implementation, which leverages the data plane programmability at line rate gained from P4. Our initial results of transporting distributed hash table logic from hosts' user space to the fast path of switches in the network data plane are promising. We show that No-hop improves the performance of locating the responsible host and maintains the properties of distributed hash tables while outperforming two baselines.","PeriodicalId":426581,"journal":{"name":"Proceedings of the Symposium on Architectures for Networking and Communications Systems","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124480555","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Towards a Framework for One-sided RDMA Multicast 单侧RDMA组播框架的研究
Proceedings of the Symposium on Architectures for Networking and Communications Systems Pub Date : 2021-12-13 DOI: 10.1145/3493425.3502766
Xin Zhe Khooi, Chai Song, M. Chan
{"title":"Towards a Framework for One-sided RDMA Multicast","authors":"Xin Zhe Khooi, Chai Song, M. Chan","doi":"10.1145/3493425.3502766","DOIUrl":"https://doi.org/10.1145/3493425.3502766","url":null,"abstract":"We present the design and prototyping of a framework to support multicast for remote direct memory accesses (RDMA), specifically the one-sided WRITE operation. We use P4 programmable hardware to augment fixed-function RDMA transport hardware found on commodity NICs to enable one-sided RDMA multicast with zero-CPU overhead. Finally, we outline the potential challenges and future directions in realizing the framework for large-scale data center deployments.","PeriodicalId":426581,"journal":{"name":"Proceedings of the Symposium on Architectures for Networking and Communications Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114072377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Networked Answer to "Life, The Universe, and Everything" “生命、宇宙和一切”的网络答案
Proceedings of the Symposium on Architectures for Networking and Communications Systems Pub Date : 2021-12-13 DOI: 10.1145/3493425.3502770
G. Babich, K. Bengston, A. Bolin, J. Bunton, Yuqing Chen, G. Hampson, D. Humphrey, Guillaume Jourjon
{"title":"Networked Answer to \"Life, The Universe, and Everything\"","authors":"G. Babich, K. Bengston, A. Bolin, J. Bunton, Yuqing Chen, G. Hampson, D. Humphrey, Guillaume Jourjon","doi":"10.1145/3493425.3502770","DOIUrl":"https://doi.org/10.1145/3493425.3502770","url":null,"abstract":"In the last few years, Input/Output (I/O) bandwidth limitation of legacy computer architectures forced us to reconsider where and how to store and compute data across a large range of applications. This shift has been made possible with the concurrent development of both smartNICs and programmable switches with a common programming language (P4), and the advent of attached High Bandwidth Memory within smartNICs/FPGAs. Recently, proposals to use this kind of technology have emerged to tackle computer science related issues such as fast consensus algorithm in the network, network accelerated key-value stores, machine learning, or data-center data aggregation. In this paper, we introduce a novel architecture that leverages these advancements to potentially accelerate and improve the processing of radio-astronomy Digital Signal Processing (DSP), such as correlators or beamformers, at unprecedented continuous rates in what we have called the \"Atomic COTS\" design. We give an overview of this new type of architecture to accelerate digital signal processing, leveraging programmable switches and HBM capable FPGAs. We also discuss how to handle radio astronomy data streams to pre-process this stream of data for astronomy science products such as pulsar timing and search. Finally, we illustrate, using a proof of concept, how we can process emulated data from the Square Kilometer Array (SKA) project to time pulsars.","PeriodicalId":426581,"journal":{"name":"Proceedings of the Symposium on Architectures for Networking and Communications Systems","volume":"208 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132618758","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Building an Internet Router with P4Pi 用P4Pi构建互联网路由器
Proceedings of the Symposium on Architectures for Networking and Communications Systems Pub Date : 2021-12-13 DOI: 10.1145/3493425.3502762
Radostin Stoyanov, Adam Wolnikowski, R. Soulé, S. Laki, Noa Zilberman
{"title":"Building an Internet Router with P4Pi","authors":"Radostin Stoyanov, Adam Wolnikowski, R. Soulé, S. Laki, Noa Zilberman","doi":"10.1145/3493425.3502762","DOIUrl":"https://doi.org/10.1145/3493425.3502762","url":null,"abstract":"Building an Internet Router is a popular, hands-on project used to teach computer networks. However, there is currently no hardware target that allows students to develop the project in P4 without incurring significant cost or encountering FPGA knowledge barriers. This paper presents P4Pi as a target for the Building an Internet Router project. P4Pi is a platform for developing, testing, and evaluating P4 programs on a Raspberry Pi device. We describe the architecture of the router project on P4Pi, and discuss the practical aspects of running it as a class project. The P4Pi-based router project is low-cost and easy to adopt, enabling students to focus on their P4 programming skills and to evaluate their designs on a physical target through interoperability tests with their colleagues.","PeriodicalId":426581,"journal":{"name":"Proceedings of the Symposium on Architectures for Networking and Communications Systems","volume":"386 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132982718","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
ExRec ExRec
Proceedings of the Symposium on Architectures for Networking and Communications Systems Pub Date : 2021-12-13 DOI: 10.1145/3493425.3502748
Johannes Zerwas, C. Avin, Stefan Schmid, Andreas Blenk
{"title":"ExRec","authors":"Johannes Zerwas, C. Avin, Stefan Schmid, Andreas Blenk","doi":"10.1145/3493425.3502748","DOIUrl":"https://doi.org/10.1145/3493425.3502748","url":null,"abstract":"In order to meet the increasingly stringent throughput and latency requirements in datacenter networks, several innovative network architectures based on reconfigurable optical topologies have been proposed. Examples include demand-oblivious reconfigurable topologies such as RotorNet (SIGCOMM 2017), Opera (NSDI 2020), and Sirius (SIGCOMM 2021), as well as demand-aware topologies such as ProjecToR (SIGCOMM 2016). All these architectures feature attractive performance properties using specific prototypes. However, reproducing these experiments is often difficult due to missing hardware and publicly available software. This paper presents a flexible framework for reconfigurable networks based on off-the-shelf hardware, which supports experimentation and reproducibility at a small scale. We describe how our framework, ExReC, can be instantiated with different configurations, allowing us to emulate existing architectures and to study their trade-offs. Finally, we demonstrate the application of our approach to different use cases and workloads, including distributed machine learning training.","PeriodicalId":426581,"journal":{"name":"Proceedings of the Symposium on Architectures for Networking and Communications Systems","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130741418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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