Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001最新文献_第2页

Precise exceptions in asynchronous processors 异步处理器中的精确异常

Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001 Pub Date : 2001-03-14 DOI: 10.1109/ARVLSI.2001.915547

R. Manohar, M. Nyström, Alain J. Martin

引用次数: 11

Programmable and adaptive analog filters using arrays of floating-gate circuits 使用浮动门电路阵列的可编程和自适应模拟滤波器

Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001 Pub Date : 2001-03-14 DOI: 10.1109/ARVLSI.2001.915557

M. Kucic, P. Hasler, J. Dugger, David V. Anderson

引用次数: 55

A low-power asynchronous VLSI FIR filter 一种低功耗异步VLSI FIR滤波器

Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001 Pub Date : 2001-03-14 DOI: 10.1109/ARVLSI.2001.915548

V. A. Bartlett, E. Grass

引用次数: 8

Dynamic receiver biasing for inter-chip communication 芯片间通信的动态接收机偏置

Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001 Pub Date : 2001-03-14 DOI: 10.1109/ARVLSI.2001.915554

C. Gauthier, J. Sivagnaname, R.B. Brown

{"title":"Dynamic receiver biasing for inter-chip communication","authors":"C. Gauthier, J. Sivagnaname, R.B. Brown","doi":"10.1109/ARVLSI.2001.915554","DOIUrl":"https://doi.org/10.1109/ARVLSI.2001.915554","url":null,"abstract":"A noise cancellation circuit was designed to improve the performance of a single-ended source-synchronous I/O interface. Common-mode variations between the high-frequency data bits and the DC reference against which they are compared were nulled using negative feedback. The clock and its complement were filtered at the receiving chip to establish an average value, which corresponds to duty cycle. That value was amplified and fed back to correct the biasing of the I/O receivers in such a way that the clocks were received with 50% duty-cycle. The biasing is shared among all I/O receivers. A prototype was designed in the HP-14B CMOS process and demonstrated using a current-mode I/O receiver that was developed simultaneously. The power supply voltage was 2.5-V. Measured results indicated that the noise cancellation circuit improved the receiver's bandwidth improved by 12% (1020-Mb/s vs 910-Mb/s), and system's static power-supply rejection (between transmitter and receiver) improved by a factor of 3.75 (/spl Delta/V/sub DD/=750-mV vs/spl Delta/V/sub DD/=200-mV). A more I/O conventional interface was also implemented using this technique in a 0.18 /spl mu/m CMOS process. The simulation environment allowed for a direct comparison between a conventional voltage reference transmission scheme and the dynamic biasing technique given a mismatch in transmitter and receiver process corners, a 100 cm signal trace, and a 5% static power supply gradient between the two chips. Simulated results indicated that the use of dynamic biasing reduced the timing jitter in the received eye from 1.8 ns to 1.18 ns, for a 3.0 ns bit-time.","PeriodicalId":424368,"journal":{"name":"Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134164283","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Logic design considerations for 0.5-volt CMOS 0.5伏CMOS的逻辑设计注意事项

Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001 Pub Date : 2001-03-14 DOI: 10.1109/ARVLSI.2001.915552

K. Hass, J. Venbrux, P. Bhatia

引用次数: 7

Width-adaptive data word architectures 宽度自适应数据字架构

Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001 Pub Date : 2001-03-14 DOI: 10.1109/ARVLSI.2001.915555

R. Manohar

引用次数: 19

Asynchronous array multiplier with an asymmetric parallel array structure 非对称并行阵列结构的异步阵列乘法器

Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001 Pub Date : 2001-03-14 DOI: 10.1109/ARVLSI.2001.915561

Chan-Ho Park, Byun-Soo Choi, Dong-Ik Lee, Ho-Yong Choi

引用次数: 8