{"title":"Approximate computing: Energy-efficient computing with good-enough results","authors":"A. Raghunathan, K. Roy","doi":"10.1109/IOLTS.2013.6604092","DOIUrl":"https://doi.org/10.1109/IOLTS.2013.6604092","url":null,"abstract":"Summary form only given. With the explosion in digital data, computing platforms are increasingly being used to execute applications (such as web search, data analytics, sensor data processing, recognition, mining, and synthesis) for which “correctness” is defined as producing results that are good enough, or of sufficient quality. Such applications invariably demonstrate a high degree of inherent resilience to their underlying computations being executed in an approximate manner. This inherent resilience is due to several factors including redundancy in the input data, the statistical nature of the computations themselves, and the acceptability (often, inevitability) of less-than-perfect results. Approximate computing is an approach to designing systems that are more efficient, by leveraging the inherent resilience of applications. We will outline a range of approximate computing techniques that we have developed from software to architecture to circuits, which have shown promising results. We conclude with a discussion of some of the challenges that need to be addressed to facilitate a broader adoption of approximate computing.","PeriodicalId":423175,"journal":{"name":"2013 IEEE 19th International On-Line Testing Symposium (IOLTS)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114977346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Algorithm transformation methods to reduce software-only fault tolerance techniques' overhead","authors":"J. Azambuja, G. Brown, F. Kastensmidt, L. Carro","doi":"10.1109/IOLTS.2013.6604042","DOIUrl":"https://doi.org/10.1109/IOLTS.2013.6604042","url":null,"abstract":"This paper introduces a framework that tackles the costs in area and energy consumed by methodologies like spatial or temporal redundancy with a different approach: given an algorithm, we find a transformation in which part of the computation involved is transformed into memory accesses. The precomputed data stored in memory can be protected then by applying traditional and well established ECC algorithms to provide fault tolerant hardware designs. At the same time, the transformation increases the performance of the system by reducing its execution time, which is then used by customized software-only fault tolerant techniques to protect the system without any degradation when compared to its original form. Application of this technique to key algorithms in a MP3 player, combined with a fault injection campaign, show that this approach increases fault tolerance up to 92%, without any performance degradation.","PeriodicalId":423175,"journal":{"name":"2013 IEEE 19th International On-Line Testing Symposium (IOLTS)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129833228","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Gilles Bizot, Fabien Chaix, N. Zergainoh, M. Nicolaidis
{"title":"Variability-aware and fault-tolerant self-adaptive applications for many-core chips","authors":"Gilles Bizot, Fabien Chaix, N. Zergainoh, M. Nicolaidis","doi":"10.1109/IOLTS.2013.6604048","DOIUrl":"https://doi.org/10.1109/IOLTS.2013.6604048","url":null,"abstract":"The coming era of chips consisting of billions of gates foreshadows processors containing thousands of unreliable cores. In this context, high energy efficiency will be available, under the constraint that applications leverage the large amount of computing cores, while masking frequent faults of the chip. In this paper, an high-level method is proposed to map and manage a parallel application on an unreliable many-cores processor System on Chip. The approach takes into account versatile constraints relative to these processors (e.g. variability, core-level DVFS) and a generic algorithm is proposed. The distributed mapping process is based on the dynamic search of the best-suited processing node, upon task creation or node defect. An adaptive stop criteria is defined in order to balance the mapping impact and application efficiency gains. The validity of the proposition is assessed with high-level simulations, under different variability and application conditions.","PeriodicalId":423175,"journal":{"name":"2013 IEEE 19th International On-Line Testing Symposium (IOLTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129460329","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Error detection encoding for multi-threshold capture mechanism","authors":"Kedar Karmarkar, S. Tragoudas","doi":"10.1109/IOLTS.2013.6604057","DOIUrl":"https://doi.org/10.1109/IOLTS.2013.6604057","url":null,"abstract":"The crosstalk induced delays have become a significant bottleneck in deep sub-micron communication. The encoding techniques proposed in existing literature, that cope with crosstalk while providing error detection capabilities require significantly high redundancy to achieve the goal. It is shown in recent publications that the effect of crosstalk can be mitigated by using multiple threshold voltages without the use of redundant bits. However such a method is more susceptible to noise due to the reduced voltage slack introduced by multiple threshold voltages. This paper proposes a novel error detection encoding technique suitable for multi-threshold capture mechanism. The proposed technique uses multiple thresholds to mitigate the effect of crosstalk while introducing redundant bits for error detection purpose only. As observed in the experimental evaluation section, the proposed encoding technique has significantly less amount of redundancy as compared to existing techniques.","PeriodicalId":423175,"journal":{"name":"2013 IEEE 19th International On-Line Testing Symposium (IOLTS)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114567373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}