Proceedings of the 12th ACM International Conference on Computing Frontiers最新文献

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SARP: producing approximate results with small correctness losses for cloud interactive services SARP:为云交互服务生成近似结果,正确性损失较小
Proceedings of the 12th ACM International Conference on Computing Frontiers Pub Date : 2015-05-06 DOI: 10.1145/2742854.2742858
Rui Han, Junwei Wang, Fengming Ge, J. L. Vázquez-Poletti, Jianfeng Zhan
{"title":"SARP: producing approximate results with small correctness losses for cloud interactive services","authors":"Rui Han, Junwei Wang, Fengming Ge, J. L. Vázquez-Poletti, Jianfeng Zhan","doi":"10.1145/2742854.2742858","DOIUrl":"https://doi.org/10.1145/2742854.2742858","url":null,"abstract":"Despite the importance of providing fluid responsiveness to user requests for interactive services, such request processing is very resource expensive when dealing with large-scale input data. These often exceed the application owners' budget when services are deployed on a cloud, in which resources are charged in monetary terms. Providing approximate processing results is a feasible solution for such problem that trades off request correctness (quantified by output quality) for response time reduction. However, existing techniques in this area either use partial input data or skip expensive computations to produce approximate results, thus resulting in large losses in output quality on a tight resource budget. In this paper, we propose SARP, a Synopsis-based Approximate Request Processing framework to produce approximate results with small correctness losses even using small amount of resources. To achieve this, SARP conducts full computations over the statistical aggregation of the entire input data using two key ideas: (1) offline synopsis management that generates and maintains a set of synopses that represent the statistical aggregation of original input data at different approximation levels. (2) Online synopsis selection that considers both the current resource allocation and the workload status so as to select the synopsis with the maximal length that can be processed within the required response time. We demonstrate the effectiveness of our approach by testing the recommendation services in E-commerce sites using a large, real-world dataset. Using prediction accuracy as the output quality, the results demonstrate: (i) SARP achieves significant response time reduction with very small quality losses compared to the exact processing results.(ii) Using the same processing time, SARP demonstrates a considerable reduction in quality loss compared to existing approximation techniques.","PeriodicalId":417279,"journal":{"name":"Proceedings of the 12th ACM International Conference on Computing Frontiers","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125365840","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Asteroid: scalable online memory diagnostics 小行星:可扩展的在线内存诊断
Proceedings of the 12th ACM International Conference on Computing Frontiers Pub Date : 2015-05-06 DOI: 10.1145/2742854.2742861
Musfiq Rahman, B. Childers
{"title":"Asteroid: scalable online memory diagnostics","authors":"Musfiq Rahman, B. Childers","doi":"10.1145/2742854.2742861","DOIUrl":"https://doi.org/10.1145/2742854.2742861","url":null,"abstract":"Memory diagnostics play an important role in addressing the worsening resilience problem for DRAM main memory. As device scales reach the extremes of physical limits, memory is becoming more prone to transient and permanent errors. Online memory diagnostics can be used as part of a comprehensive strategy to mitigate errors. This paper presents a new approach, Asteroid, to incorporate memory diagnostics in a system actively serving a workload. The approach dynamically adjusts itself to workload behavior and resource availability to maximize test thoroughness and minimize performance overhead. In a 16-core enterprise server, Asteroid has modest overhead of 1% to 4% for workloads with low to high memory demand.","PeriodicalId":417279,"journal":{"name":"Proceedings of the 12th ACM International Conference on Computing Frontiers","volume":"84 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124882282","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Free atomic consistency in storage class memory with software based write-aside persistence 使用基于软件的写边持久性在存储类内存中释放原子一致性
Proceedings of the 12th ACM International Conference on Computing Frontiers Pub Date : 2015-05-06 DOI: 10.1145/2742854.2742902
Ellis R. Giles, K. Doshi, P. Varman
{"title":"Free atomic consistency in storage class memory with software based write-aside persistence","authors":"Ellis R. Giles, K. Doshi, P. Varman","doi":"10.1145/2742854.2742902","DOIUrl":"https://doi.org/10.1145/2742854.2742902","url":null,"abstract":"This paper describes a lightweight software library to solve the challenges [5, 3, 1, 4, 2] of programming storage class memory (SCM). It provides primitives to demarcate failure-atomic code regions. SCM loads and stores within each de-marcated code region (called a \"wrap\") are routed through the library, which buffers updates and transmits them to SCM locations asynchronously while allowing their speedy propagation from writers to readers through CPU caches.","PeriodicalId":417279,"journal":{"name":"Proceedings of the 12th ACM International Conference on Computing Frontiers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116541641","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Chrysso: an integrated power manager for constrained many-core processors Chrysso:一个集成电源管理器,用于受限的多核处理器
Proceedings of the 12th ACM International Conference on Computing Frontiers Pub Date : 2015-05-06 DOI: 10.1145/2742854.2742885
S. S. Jha, W. Heirman, Ayose Falcón, Trevor E. Carlson, K. V. Craeynest, Jordi Tubella, Antonio González, L. Eeckhout
{"title":"Chrysso: an integrated power manager for constrained many-core processors","authors":"S. S. Jha, W. Heirman, Ayose Falcón, Trevor E. Carlson, K. V. Craeynest, Jordi Tubella, Antonio González, L. Eeckhout","doi":"10.1145/2742854.2742885","DOIUrl":"https://doi.org/10.1145/2742854.2742885","url":null,"abstract":"Modern microprocessors are increasingly power-constrained as a result of slowed supply voltage scaling (end of Dennard scaling) in conjunction with the transistor density scaling (Moore's Law). Existing many-core power management techniques such as chip-wide/per-core DVFS, and core and cache adaptation are quite effective in isolation at moderate to high power budgets. However, for future many-core chip, the existing techniques do not scale well to large core counts, small time slices and stringent power budgets. We need a new solution that combines different adaptation and reconfiguration techniques. In this paper, we present Chrysso, an integrated, scalable and low-overhead power management framework. Chrysso consists of a three-step process: leveraging simple analytical performance and power models, pruning the search space early using local Pareto front generation, followed by global utility-based power allocation. This ensures scalable and effective dynamic adaptation of many-core processors at short time scales along multiple axes, including core, cache and per-core DVFS adaptations. By integrating multiple power management techniques into a common methodology, Chrysso provides significant performance improvements over isolated mechanisms within a given power budget without power-gating cores. On a 64-core system, Chrysso improves system throughput by 1.6× and 1.9× over core-gating at stringent power envelops for multi-program (SPEC) and multi-threaded (PARSEC) workloads, respectively.","PeriodicalId":417279,"journal":{"name":"Proceedings of the 12th ACM International Conference on Computing Frontiers","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126871144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
A modified HEVC decoder for low power decoding 一种改进的HEVC解码器,用于低功耗解码
Proceedings of the 12th ACM International Conference on Computing Frontiers Pub Date : 2015-05-06 DOI: 10.1145/2742854.2747284
Erwan Nogues, E. Raffin, M. Pelcat, D. Ménard
{"title":"A modified HEVC decoder for low power decoding","authors":"Erwan Nogues, E. Raffin, M. Pelcat, D. Ménard","doi":"10.1145/2742854.2747284","DOIUrl":"https://doi.org/10.1145/2742854.2747284","url":null,"abstract":"The increasing prominence of video oriented services, such as video conferencing, streaming or sharing, over other Internet services has made video decoding a must-have feature for any consumer device. As a complex signal processing task, video decoding puts a high pressure on battery-driven devices since battery autonomy becomes a key performance indicator for a device. In a near future, HEVC video compression standard is to replace H.264 as the dominating standard since it doubles video compression rates for the same subjective image quality, widening the scope of video applications. In this paper, a modified HEVC decoder is proposed within the context of MPEG Green Metadata. This decoder fosters energy-efficient implementations on embedded systems. Experiments show that without changing the incoming bitstream, a software implementation of the modified decoder can save up to 28% of energy while introducing limited distortion.","PeriodicalId":417279,"journal":{"name":"Proceedings of the 12th ACM International Conference on Computing Frontiers","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115517549","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Enhancing an x86_64 multi-core architecture with data-flow execution support 增强具有数据流执行支持的x86_64多核架构
Proceedings of the 12th ACM International Conference on Computing Frontiers Pub Date : 2015-05-06 DOI: 10.1145/2742854.2742896
Nam Ho, Andrea Mondelli, A. Scionti, M. Solinas, A. Portero, R. Giorgi
{"title":"Enhancing an x86_64 multi-core architecture with data-flow execution support","authors":"Nam Ho, Andrea Mondelli, A. Scionti, M. Solinas, A. Portero, R. Giorgi","doi":"10.1145/2742854.2742896","DOIUrl":"https://doi.org/10.1145/2742854.2742896","url":null,"abstract":"Future exascale machines will require multi--/ many-core architectures able to efficiently run multi-threaded applications. Data-flow execution models have demonstrated to be capable of improving execution performance by limiting the synchronization overhead. This paper proposes to augment cores with a minimalistic set of hardware units and dedicated instructions that allow efficiently scheduling the execution of threads on the basis of data-flow principles. Experimental results show performance improvements of the system when compared with other techniques (e.g., OpenMP, Cilk).","PeriodicalId":417279,"journal":{"name":"Proceedings of the 12th ACM International Conference on Computing Frontiers","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116557838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
Scheduling stream programs with improving arithmetic unit usage on NoC-based VLIW multi-core architectures 在基于noc的VLIW多核体系结构上调度流程序,提高算法单元的使用
Proceedings of the 12th ACM International Conference on Computing Frontiers Pub Date : 2015-05-06 DOI: 10.1145/2742854.2742872
Guoyue Jiang, Zhaolin Li, Fang Wang, Shaojun Wei
{"title":"Scheduling stream programs with improving arithmetic unit usage on NoC-based VLIW multi-core architectures","authors":"Guoyue Jiang, Zhaolin Li, Fang Wang, Shaojun Wei","doi":"10.1145/2742854.2742872","DOIUrl":"https://doi.org/10.1145/2742854.2742872","url":null,"abstract":"Stream programming model has received a lot of interest due to its naturally-exposed task, data and pipeline parallelism. Many researches concentrated on scheduling stream programs on multi-core systems. However, few of them consider the arithmetic unit utilization, which is a vital factor to determine the performance of multi-core systems. This paper focuses on scheduling stream programs on NoC-based VLIW multi-core architectures, aiming at improving the performance through increasing the arithmetic unit utilization. Three phases are proposed for the scheme. First, the stream program is replicated into multiple threads for providing enough parallel kernels. Second, parallel kernels are grouped and operators of each kernel group are scheduled together for high arithmetic unit utilization. Third, a hierarchical integer linear programming (ILP)-based methodology is proposed to map kernel groups onto each core for optimizing the maximum workload. A set of benchmarks are exploited for evaluation. Experimental results show that, compared with two other existing scheduling schemes, our proposed scheme can significantly improve the performance of the multi-core processor.","PeriodicalId":417279,"journal":{"name":"Proceedings of the 12th ACM International Conference on Computing Frontiers","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133114685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Socialness in the recruiting of software engineers 招聘软件工程师时的社会性
Proceedings of the 12th ACM International Conference on Computing Frontiers Pub Date : 2015-05-06 DOI: 10.1145/2742854.2742879
J. Ehlers
{"title":"Socialness in the recruiting of software engineers","authors":"J. Ehlers","doi":"10.1145/2742854.2742879","DOIUrl":"https://doi.org/10.1145/2742854.2742879","url":null,"abstract":"Recruiting of highly qualified software engineers takes place in a very competitive and global job market. Agile methods have emphasized the relevance of social skills for an efficient and sustainable interaction of individuals. At the same time, employing companies have to provide working conditions which attract and support teams of high skilled and demanding software engineers. In this paper, we evaluate the efforts of IT companies in acquiring software engineers by emphasizing socialness in their job ads. We analyze 75,000 jobs ads from the recruiting platform Indeed to quantify differences in the regional distribution of social factors, and about 2,800 job ads from StackoverflowCareers to investigate correlations between social factors and the employee satisfaction of a work place. Our findings show that many companies advertise socialness explicitly by aspects as extraordinary food offers, a great team, social events, a game room, or family friendliness. Well-established standard benefits such as health care, paid vacation, or retirement savings are non-unique job characteristics. Advanced jobs allow for higher degrees of freedom concerning the location and time of work being advertised by flextime, remote work, or unlimited vacation.","PeriodicalId":417279,"journal":{"name":"Proceedings of the 12th ACM International Conference on Computing Frontiers","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134464551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
An empirical high level performance model for future many-cores 未来多核的经验高级性能模型
Proceedings of the 12th ACM International Conference on Computing Frontiers Pub Date : 2015-05-06 DOI: 10.1145/2742854.2742867
Surya Narayanan, B. N. Swamy, André Seznec
{"title":"An empirical high level performance model for future many-cores","authors":"Surya Narayanan, B. N. Swamy, André Seznec","doi":"10.1145/2742854.2742867","DOIUrl":"https://doi.org/10.1145/2742854.2742867","url":null,"abstract":"Estimating the potential performance of parallel applications on the yet-to-be-designed future many cores is very speculative. The simple models proposed by Amdahl's law (fixed input problem size) or Gustafson's law (fixed number of cores) do not completely capture the scaling behaviour of a multi-threaded (MT) application leading to over estimation of performance in the many-core era. On the other hand, modeling many-core by simulation is too slow to study the applications performance. In this paper, we propose a more refined but still tractable, high level empirical performance model for multi-threaded applications, the Serial/Parallel Scaling (SPS) Model to study the scalability and performance of application in many-core era. SPS model learns the application behavior on a given architecture and provides realistic estimates of the performance in future many-cores. Considering both input problem size and the number of cores in modeling, SPS model can help in making high level decisions on the design choice of future many-core applications and architecture. We validate the model on the Many-Integrated Cores (MIC) xeon-phi with 240 logical cores.","PeriodicalId":417279,"journal":{"name":"Proceedings of the 12th ACM International Conference on Computing Frontiers","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133317784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
DP2: reducing transaction overhead with differential and dual persistency in persistent memory DP2:在持久内存中使用差分持久性和双持久性来减少事务开销
Proceedings of the 12th ACM International Conference on Computing Frontiers Pub Date : 2015-05-06 DOI: 10.1145/2742854.2742864
Long Sun, Youyou Lu, J. Shu
{"title":"DP2: reducing transaction overhead with differential and dual persistency in persistent memory","authors":"Long Sun, Youyou Lu, J. Shu","doi":"10.1145/2742854.2742864","DOIUrl":"https://doi.org/10.1145/2742854.2742864","url":null,"abstract":"Emerging non-volatile memory (NVRAM) technologies, like phase change memory, envision persistent memory architectures. In case of power failure, operations on persistent memory should be in transactional semantics by adopting techniques such as WAL. To ensure consistency and atomicity, persist barriers are widely adopted, to prevent persistent memory controller from scheduling writes and exploiting bank-level parallelism of NVRAM devices. Besides, unified retention time for persistent writes, i.e., log and data writes, further reduces the performance of persistent memory system, while retention time for log writes does not need to be so long due to periodic truncation. In this paper, we study how NVRAM write latency affects the system throughput and propose DP2, which consists of two main techniques: differential persistency and dual persistency. Differential persistency distinguishes log writes from data writes, and enhances the NVRAM memory controller to schedule log writes across persist barriers to fully utilize bank level parallelism. Dual persistency relaxes the retention time of log writes to reduce write latency and the iterations per write, which in turn enhances lifetime of NVRAM devices. Evaluation results show that our proposed techniques improve system throughput up by 43% on average and extend lifetime up by 47%, with 104-s retention time for log writes.","PeriodicalId":417279,"journal":{"name":"Proceedings of the 12th ACM International Conference on Computing Frontiers","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125324033","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
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