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1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers最新文献

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Dielectrically isolated ICs made with preferential etching 采用优先蚀刻工艺制成的介电隔离集成电路
1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1977.1155740
P. Barth, J. Angell
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引用次数: 1
Integrated dual tone multi-frequency telephone dialer 集成双音多频电话拨号器
1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1977.1155665
M. Callahan, C. Johnson
{"title":"Integrated dual tone multi-frequency telephone dialer","authors":"M. Callahan, C. Johnson","doi":"10.1109/ISSCC.1977.1155665","DOIUrl":"https://doi.org/10.1109/ISSCC.1977.1155665","url":null,"abstract":"","PeriodicalId":416313,"journal":{"name":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"237 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132230170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Fixed-tuned high-power F-band TRAPATT amplifier 固定调谐高功率f波段TRAPATT放大器
1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1977.1155632
T. Fong, J. McCandless, E. Nakaji, R. Ying
{"title":"Fixed-tuned high-power F-band TRAPATT amplifier","authors":"T. Fong, J. McCandless, E. Nakaji, R. Ying","doi":"10.1109/ISSCC.1977.1155632","DOIUrl":"https://doi.org/10.1109/ISSCC.1977.1155632","url":null,"abstract":"A FIXED-TUNED MIC TRAPATT amplifier has recently been developed which is insensitive to diode parameter variations such as breakdown voltage and junction capacitance. This characteristic is particularly desirable for applications involving 1 ow cost production such as fusing and phased array radar. In this paper the design and performance of this amplifier will be described. The amplifier dcsign is based on the bandpasss impedance transforming characteristics of a pair of coupled lines’. The use of the coupled line structure allows circuit matching to be realized at the fundamental TRAPATT as well as its harmonic frequencies without additional tuning elements. A coupled line MIC TRAPATT amplifier operated in the second harmonic extration mode has been reported2. This project involved the use of fundamental mode extraction to achieve high efficiency. The basic amplifier excluding the input-output circulator is shown in Figure 1. The amplifier consists of a multiple-section bias-filter, a pair of open-ended coupled lines approximately a quarter-wave in length, and a SMA output connector. Two capacitors of fixed value (0.2 pF) are provided at one end of the coupled line to achieve the proper impedance matching at the second harmonic. The packaged diode is mounted from the ground-plane side and located approximately one third of the line length from the end of the line. Figure 1 illustrates the extreme simplicity of the fixed tuned amplifier circuit.","PeriodicalId":416313,"journal":{"name":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"137 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116042921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Electrically erasable buried gate PROM 电可擦除埋门PROM
1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1977.1155705
C. Neugebauer, J. Burgess, L. Stein
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引用次数: 2
Wafer sort trimming of analog ICs 模拟集成电路的晶圆排序修整
1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1977.1155724
W. Lillis
{"title":"Wafer sort trimming of analog ICs","authors":"W. Lillis","doi":"10.1109/ISSCC.1977.1155724","DOIUrl":"https://doi.org/10.1109/ISSCC.1977.1155724","url":null,"abstract":"","PeriodicalId":416313,"journal":{"name":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128548057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A CMOS/SOS 16-bit parallel µ CPU CMOS/SOS 16位并行电路µCPU
1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1977.1155730
L. Dang, P. Ashkin, R. Yee, M. O'Brien
{"title":"A CMOS/SOS 16-bit parallel µ CPU","authors":"L. Dang, P. Ashkin, R. Yee, M. O'Brien","doi":"10.1109/ISSCC.1977.1155730","DOIUrl":"https://doi.org/10.1109/ISSCC.1977.1155730","url":null,"abstract":"","PeriodicalId":416313,"journal":{"name":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117015132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
BCD analog memory with differential integrated clock pulse generator 带差分集成时钟脉冲发生器的BCD模拟存储器
1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1977.1155648
S. Ohba, M. Aoki, M. Kubo, N. Hashimoto, H. Nakamura
{"title":"BCD analog memory with differential integrated clock pulse generator","authors":"S. Ohba, M. Aoki, M. Kubo, N. Hashimoto, H. Nakamura","doi":"10.1109/ISSCC.1977.1155648","DOIUrl":"https://doi.org/10.1109/ISSCC.1977.1155648","url":null,"abstract":"THE ADVENT of charge transfer devices is expected to make feasible the realization of various signal processing systems such as TV ghost cancellers, VTR jitter cancellers and TV-phone systems. The performance of these devices, however, is severely limited by: 1) the poor signal to noise ratio in a picture tube due to higher harmonic interference from external clock pulse circuits, 2) the output gain and level fluctuation’ ,2 caused by unbalanced clock pulses with ringing and crosstalk varying the effective clock pulse frequency, and 3) narrow dynamic range resulting from the nonlinear gate capacitance. The second limitation arises because the input and output signal charges in a sensing diffusion layer are determined by electrode potential; that is, the clock pulse waveform. A 64 stage bulk charge-transfer device analog memory with a novel clock pulse generator has been developed to eliminate these problems.","PeriodicalId":416313,"journal":{"name":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133207199","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Micropowered IC modulator for biomedical telemetry 用于生物医学遥测的微功率IC调制器
1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1977.1155655
J. Topich, Wen Ko, M. Guvenc
{"title":"A Micropowered IC modulator for biomedical telemetry","authors":"J. Topich, Wen Ko, M. Guvenc","doi":"10.1109/ISSCC.1977.1155655","DOIUrl":"https://doi.org/10.1109/ISSCC.1977.1155655","url":null,"abstract":"","PeriodicalId":416313,"journal":{"name":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133774323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
C2MOS 4K static RAM C2MOS 4K静态RAM
1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1977.1155672
K. Ochii, Y. Suzuki, M. Ueno, K. Sato, K. Asahi
{"title":"C2MOS 4K static RAM","authors":"K. Ochii, Y. Suzuki, M. Ueno, K. Sato, K. Asahi","doi":"10.1109/ISSCC.1977.1155672","DOIUrl":"https://doi.org/10.1109/ISSCC.1977.1155672","url":null,"abstract":"size, compared with an NMOS RAM of the same capacity, CMOS RAMS have, to date, been limited, at most, to 1K bits. Recently-, higher packing density and reduced cost have been required o f a MOS memory system. CMOS RAMS are no exception. In response t o this demand, a C'MOS(C1ockcd CMOS) 4K static RAM, measuring 4.7 mm square, has been developed. The target for large scale integration, namely 4K bits, within reasonable chip size, has been realized with the following features: (1 ) The RAM is static, in the sense that the content of the On the other hand, having the disadvantage of increased chip","PeriodicalId":416313,"journal":{"name":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117077484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A selection system for MNOS capacitor memories MNOS电容存储器的选择系统
1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1977.1155639
J. Raffel, J. Yasaitis
{"title":"A selection system for MNOS capacitor memories","authors":"J. Raffel, J. Yasaitis","doi":"10.1109/ISSCC.1977.1155639","DOIUrl":"https://doi.org/10.1109/ISSCC.1977.1155639","url":null,"abstract":"","PeriodicalId":416313,"journal":{"name":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"135 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114177012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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