BCD analog memory with differential integrated clock pulse generator

S. Ohba, M. Aoki, M. Kubo, N. Hashimoto, H. Nakamura
{"title":"BCD analog memory with differential integrated clock pulse generator","authors":"S. Ohba, M. Aoki, M. Kubo, N. Hashimoto, H. Nakamura","doi":"10.1109/ISSCC.1977.1155648","DOIUrl":null,"url":null,"abstract":"THE ADVENT of charge transfer devices is expected to make feasible the realization of various signal processing systems such as TV ghost cancellers, VTR jitter cancellers and TV-phone systems. The performance of these devices, however, is severely limited by: 1) the poor signal to noise ratio in a picture tube due to higher harmonic interference from external clock pulse circuits, 2) the output gain and level fluctuation’ ,2 caused by unbalanced clock pulses with ringing and crosstalk varying the effective clock pulse frequency, and 3) narrow dynamic range resulting from the nonlinear gate capacitance. The second limitation arises because the input and output signal charges in a sensing diffusion layer are determined by electrode potential; that is, the clock pulse waveform. A 64 stage bulk charge-transfer device analog memory with a novel clock pulse generator has been developed to eliminate these problems.","PeriodicalId":416313,"journal":{"name":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1977.1155648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

THE ADVENT of charge transfer devices is expected to make feasible the realization of various signal processing systems such as TV ghost cancellers, VTR jitter cancellers and TV-phone systems. The performance of these devices, however, is severely limited by: 1) the poor signal to noise ratio in a picture tube due to higher harmonic interference from external clock pulse circuits, 2) the output gain and level fluctuation’ ,2 caused by unbalanced clock pulses with ringing and crosstalk varying the effective clock pulse frequency, and 3) narrow dynamic range resulting from the nonlinear gate capacitance. The second limitation arises because the input and output signal charges in a sensing diffusion layer are determined by electrode potential; that is, the clock pulse waveform. A 64 stage bulk charge-transfer device analog memory with a novel clock pulse generator has been developed to eliminate these problems.
带差分集成时钟脉冲发生器的BCD模拟存储器
电荷转移器件的出现有望使各种信号处理系统的实现成为可能,如电视幽灵消除器、VTR抖动消除器和电视电话系统。然而,这些器件的性能受到以下因素的严重限制:1)由于外部时钟脉冲电路的高谐波干扰导致显像管的信噪比较差;2)输出增益和电平波动;2)由于时钟脉冲不平衡引起的振铃和串扰改变了有效时钟脉冲频率;3)非线性门电容导致的动态范围狭窄。第二个限制是因为传感扩散层中的输入和输出信号电荷由电极电位决定;即时钟脉冲波形。为了解决这些问题,研制了一种具有新型时钟脉冲发生器的64级块电荷转移器件模拟存储器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信