ACM-SE 28最新文献

{"title":"The C preprocessor and Jensen's device","authors":"D. Boyd","doi":"10.1145/98949.99018","DOIUrl":"https://doi.org/10.1145/98949.99018","url":null,"abstract":"When teaching a course in Programming Languages, one generally discusses dif­ ferent methods for passing parameters to subprograms. Most students, being some­ what proficient in Pascal, have a basic understanding of the difference between passing parameters by value and passing them by address. Those who have pro­ grammed in C usually have acquired a better understanding of this difference through experience, since parameters are all passed by value, so that addresses must be passed explicitly when one wants to pass by address. Other parameter passing methods are new to these stu­ dents. The advantages of being able to pass parameters by result are worth discussing since most students under­ stand parameters which are used as out-","PeriodicalId":409883,"journal":{"name":"ACM-SE 28","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132929942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Runtime debuggers for parallel and distributed systems: a uniform design approach","authors":"M. Sarkar","doi":"10.1145/98949.99159","DOIUrl":"https://doi.org/10.1145/98949.99159","url":null,"abstract":"A bstract Debugging parallel and distributed programs is harder than debugging sequential programs. A number of debuggers have been developed to alleviate the problem of debugging parallel and distributed programs. But there is a lack of any uniform approach to debugging such systems and as a result each debugger is different. In this paper, first the reasons behind this absence of theory of debugging is explored. Then an attempt is made to determine common techniques employed in some available debuggers. These techniques are classified according to the situations where they are applicable. Finally some suggestions arc made about how one can go about designing more general purpose debuggers. A layered approach that isolates the peculiarities of different situations is recommended.","PeriodicalId":409883,"journal":{"name":"ACM-SE 28","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124282886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A metric for the effectiveness of graphical language presentation in terms of competency","authors":"John W. Olson, H. Longenecker","doi":"10.1145/98949.99060","DOIUrl":"https://doi.org/10.1145/98949.99060","url":null,"abstract":"The task of developing a metric to gauge the effectiveness of graphical presentation techniques in teaching computer and information science concepts involves the measurement of student competency. Previous work in the general subject area has ad­ dressed the use of with flowchart techniques in terms of student preference and timed response indicating a superiority of flowchart representation over pseudocode [7] Other research [3] is being directed at the elTicacy of graphic representation as a post factum tool for debugging and maintenance. The anticipated success of that study will only serve to emphasize the importance of validating the graphic approach for instructional use. Positive results have recently been achieved using a graphical method in introductory courses [4]. The current study aims to document the degree to which graphic presentation enhances student learn­ ing. The hypothesis for our work is that the graphi­ cal method is more direct [1] and will be proven to produce significant improvement in specific learning areas. Crucial to creation of an appropriate environ­ ment in which to test the hypothesis is the choice of a model and methodology which will enable the researchers to make concrete evaluations of progress based on observable performance. The goal is to eliminate subjective judgments of student accomp­ lishment. The competency model suggested by the ICCP [6] is a restatement of a taxonomy of objectives formulated in the mid 1950’s [2], The value of this taxonomy is that it addresses competency directly in terms of depth of knowledge. The model lends itself well to (he development of a metric because under­ lying the concept of depth of knowledge is the con­ straint that each depth level is discrete. The classification problems inherent in a continuous scale are thus avoided. This also coincides with the thrust of the graphical environment with its emphasis on","PeriodicalId":409883,"journal":{"name":"ACM-SE 28","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128336071","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Design of a simulation interface for a parallel computing environment","authors":"H. Narang, R. Flanery, J. Drake","doi":"10.1145/98949.99120","DOIUrl":"https://doi.org/10.1145/98949.99120","url":null,"abstract":"A user interface for simulation of contaminant transport in groundwater flow using a distributed memory parallel processor is described. The user interface is a menu-mouse driven presentation using the X-Windows software. To facilitate the division and distribution of data among processors and to develop a data structure capable of manipulation for a variety of functions, graphics, remeshing, input and retrieval of auxiliary information, an object oriented programming style is used. The parallel computational model for the update of contaminant concentrations is organized around objects and an explicit time marching algorithm implemented on an IPSC2 Hypercube multiprocessor. 6 refs.","PeriodicalId":409883,"journal":{"name":"ACM-SE 28","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126465757","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Experiences vectorizing software for elliptic partial differential equations","authors":"W. Wand, Y. Li","doi":"10.1145/98949.99048","DOIUrl":"https://doi.org/10.1145/98949.99048","url":null,"abstract":"ELLPACK is a FORTRAN-based package for solv­ ing elliptic partial differential equations; this package contains over 100 modules, each typically consisting of a number of subroutines. The enhancement of six ELLPACK modules to take advantage of the vector pro­ cessing capabilities of Cray supercomputers is discussed and variations in performance due to the use of three different compilers are also noted. Speedup factors arc computed which quantify improvements due to program optimization as well as the compiler effects. Graphic per­ formance profiles showing CPU time versus grid size arc presented. 1. Statement of the Problem One of the most important models of physical phenomena is the boundary-value problem. Examples of such phenomena include heat flow and diffusion, gravita­ tional and electrostatic potentials, fluid dynamics, and loading of beams, plates, and other objects. Because of this, much effort has been devoted to the development of reliable methods for numerically solving these equations. The underlying mathematical problem addressed by these methods is a second-order elliptic boundary-value prob­ lem consisting of a partial differential equation (PDE) Lu = auu + Ibiiry + ctiyy + duz + euy + fu = g (1) defined on a domain R and its accompanying boundary conditions","PeriodicalId":409883,"journal":{"name":"ACM-SE 28","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123003546","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Partition algorithms for the doubly linked list","authors":"J. Boyer","doi":"10.1145/98949.99118","DOIUrl":"https://doi.org/10.1145/98949.99118","url":null,"abstract":"The purpose of this paper is to present partition sort and search algorithms developed by the author for the doubly linked list. First, the binary search concept will be modified to enable its use on a linked list, and the resulting algorithm, (he Blink Search, will be shown to be more than twice as time efficient as the sequential search. The Blink Search will then be used to enhance a standard insertion sort. Upon finding that the improvement still leaves the insertion sort with the unacceptable 0(n^) rating, several linked list partition sorts will be developed. We will see later that the best of these, the Blink Sort, shows very comparable execution lime to the Quicksort on an equivalent array; in fact, the Blink Sort is rated O(nlogn) for random data and 0(n) for reversed order and sorted order lists.","PeriodicalId":409883,"journal":{"name":"ACM-SE 28","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122550281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Improving the performance of the BDB system by changing the query processing temporary file structures","authors":"R. Trueblood, P. Lai","doi":"10.1145/98949.99028","DOIUrl":"https://doi.org/10.1145/98949.99028","url":null,"abstract":"A performance study of the BDB system, a highly modular relational database management system, is conducted on the effects caused by changing the temporary file access method of the query processor from the direct access method to the record sequential access method. A built-in software monitor is used to measure query processing response lime. Experimental results show that the performance can be improved for selective type queries. For join type queries, two join algorithms, \"nested-loop\" and \"sori-mcrge,\" are investigated. Interestingly, the direct access method performed better for the nested-loop join implementation while the record sequential access method performed belter for the sortmerge implementation. The observed outcomes of these experiments are reported and are discussed in [1]. The study is conducted on non-indexed data. The BDB system is benchmarked by conducting a series of controlled experiments. The experiments used three relations, each containing two attributes. The size of the relations varied, collectively, from 1, 100, 500, 1,000, 1,500, 7,500, and 10,000 tuples. For the record sequential access Files, the buffer size is varied from 3K, 6K, 18K, and 30K. Changing the buffer size from 3K up to 30K resulted in only a 1 to 2 percent improvement. This small percentage of improvement seems to contradict the well known fact that larger buffers reduce I/O costs. Some possibile reasons for this contradiction are that the physical data path of the microcomputer is loo small to allow large buffer efficiency and that the operating system reads and/or writes disk sectors which are of fixed size. A set of nine test queries is used to obtain response time measurements from the query processor. Briefly, some the queries selected all of the tuples of a relation, some of selected only one tuple, some selected half of the tuples, and others joined the relations. The results of investigating whether the record sequential access method is belter than the direct access method for supporting temporary files created during query processing have yielded several interesting Findings. First, the investigation revealed some inefficient code such as rereading data already in the buffer area and excessive copying of data from one buffer area to another. When improved, the performance is enhanced by about 85%. Second, the record sequential access method offered a 0-14% improvement over the direct access method for selective type queries. Specifically, for one tuple there was no improvement, for selecting one-half of the relation there was a 10% improvement, and for selecting the whole relation there was a 14% improvement. Two algorithms for the join were investigated. The nested-loop, which handles the many-to-many mapping, performed belter by about 50% when the direct access method is used. The sort-merge algorithm, which handles the one-to-many mapping, performed belter by about 40% when the record sequential access method is used. A possible reason ","PeriodicalId":409883,"journal":{"name":"ACM-SE 28","volume":"577 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122763701","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Experiments in natural language processing","authors":"S. Murrell, R. Plant","doi":"10.1145/98949.99099","DOIUrl":"https://doi.org/10.1145/98949.99099","url":null,"abstract":"OF WORK IN PROGRESS Recent developments in functional programming techniques have made the field of natural language processing more amenable to experimentation. Conventional programming languages, and the programming methods normally associated with them, which due to their familiarity, seem to be satisfactory for the production of natural language applications, do in fact restrict creativity. Their cumbersome syntax and the inflexibility of their control structures and order of execution make the act of programming, which should be nothing more than the transcription of organised thoughts, into a titanic task. Frequently, coding is harder work than design. Functional programming languages [1] are normally very compact, and have little or no redundancy in their syntax. While this could be dangerous for critical systems, it can speed up prototyping by an order of magnitude. Functional languages also may have a different execution strategy, known as Lazy Evaluation [2J, under which programs take on a non-algorithmic nature, which also simplifies the design process. Experiments have shown that a powerful form of parallel processing may be incorporated into a functional system [3]. The ability to perform computationsconcurrently.withoutbeing concerned with inter-process communications or scheduling, greatly simplifies many tasks that are normally complex (e.g., resolution in logic programming, and searching data-structures). Natural language processing is a very complex domain, which has never been conquered. One of the reasons for this (apart, of course from man’s incomplete knowledge of his languages) has been our inability to perform creative experiments at a reasonable rate. Functional programming systems alleviate this inability. It is the aim of our research to explore in detail the applicability of new and existing functional programming techniques to the areas of parsing and understanding complex grammars, and processing semantic networks in the context of a natural language front end to an intelligent data retrieval system. We have already found that these techniques make a significant contribution to development in some of the major areas. As an example, we can implement the pure reasoning features of Prolog in a 20 line program, which took about one hour to produce and debug. This implementation is very easy to read, and thus makes experimentation with the reasoning methods fast and convenient. Our current investigations are centered on the production of a simple unification of the syntactic and semantic processing involved in the understandingofnaturallanguageinput. Preliminary results from experiments with a non-backtracking parser for ambiguous grammars indicate that positive results may be expected and that the techniques of functional programming may successfully be applied to practical, non-trivial","PeriodicalId":409883,"journal":{"name":"ACM-SE 28","volume":"41 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129253408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Genetic algorithm solutions for the traveling salesman problem","authors":"D'Ann Fuquay, L. D. Whitley","doi":"10.1145/98949.99033","DOIUrl":"https://doi.org/10.1145/98949.99033","url":null,"abstract":"A genetic approach (o generating solutions for the traveling salesman problem (TSP) is described and early results of tests are reported using a genetic algo­ rithm implementation known as GENTfOR which was developed at Colorado Stale University. The imple­ mentation uses a new, specialized genetic recombina­ tion operator which incorporates a high degree of nondeterminism and docs not require knowledge of dis­ tance between cities for recombination. Results reported substantiate the viability of the genetic approach for finding good solutions not only to the TSP but also to a more general class of optimization problems that do not incorporate the notion of weighted edges.","PeriodicalId":409883,"journal":{"name":"ACM-SE 28","volume":"105 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117041388","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Using the stuck-at fault model: how well does it work?","authors":"A. A. Fennisi, D. Reeves","doi":"10.1145/98949.98968","DOIUrl":"https://doi.org/10.1145/98949.98968","url":null,"abstract":"Many researchers have studied methods for both gen­ erating and simulating faults in CMOS chips. A good deal of focus has been on gate level modeling and test generation methods. The stuck at fault model and various derivations of it are still most widely used to generate test sets. Other researchers have demon­ strated the inappropriateness of the stuck at fault model for generating effective test sets for CMOS cir­ cuits. Among the fault types often missed are tran­ sistor faults, bridging faults and delay faults. In this paper a set of experiments are described to measure the effectiveness of gate level test generation methods on transistor faults. 1 I n t r o d u c t io n With the increasing densities of transistors being built onto single CMOS chips, the problem of detecting a faulty chip becomes more difficult, and the probabil­ ity of a faulty chip passing tests increases. Provided that the design phase of chip development is fault free, faults in a CMOS chip are the result of errors that oc­ cur in the fabrication process. These errors include extra or missing material on one or more of the lay­ ers built during fabrication. Researchers have studied the effects of these defects on circuit performance and classified them into different fault types[l]. 1 .1 T h e G a t e L e v e l M o d e l a n d T e s t in g Traditionally, tests for faults in the combinational por­ tion of a chip have been generated using the single line (node) stuck at fault model[2]. In this model, inputs and outputs of each logic gate (and, nand, inverter, etc.) are stimulated to produce the desired good out*This work wai supported by a grant from the Microelec­ tronics Center of North Carolina Permission to copy without fee all or part of this material is granted provided that the copies are not made or distributed for direct com­ mercial advantage, the ACM copyright notice and the title of the publication and its date appear, and notice Is given that copying Is by permission of the Association for Computing Machinery. To copy otherwise, or to republish, requires a fee and/or specific per­ mission. ©1990 ACM 0-89791-356-6/90/0400/0040 $1.50 put. In the faulty circuit, the value of a single input or output node is replaced with a logic value differ­ ent from the good circuit, thus indicating the stuck-at fault. The output of the faulty gate must then have the opposite logic value from the good circuit output to indicate the fault. For example, a three input nand gate has 8 stuck at faults in this model (see figurel). They are inputs, a, 6, and c, stuck at logic O(aaO) and stuck at logic l(sa /), and the output, z, stuck at 1 and stuck at 0. It is easy to see that if any of the inputs are stuck at 0, the output will always be a logic 1. Therefore, these faults, a sa0,b saO, c taO and z sal, fall into the same equivalence class and can all be detected by the same test: apply logic 1 to all inputs and observe a 0 on the output. If any of these faults are present, the outpu","PeriodicalId":409883,"journal":{"name":"ACM-SE 28","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122782257","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}