International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.最新文献

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Estimation of test metrics for multiple analogue parametric deviations 多重模拟参数偏差的测试指标估计

International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. Pub Date : 2006-05-01 DOI: 10.1109/DTIS.2006.1708706

A. Bounceur, S. Mir, E. Simeu, L. Rolíndez

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引用次数: 9

Implementation of scalable embedded FPGA for SOC 实现可扩展的嵌入式FPGA SOC

International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. Pub Date : 2005-06-01 DOI: 10.1109/DTIS.2006.1708687

H. Mrabet, Z. Marrakchi, H. Mehrez, A. Tissot

引用次数: 6

Physical verification of microelectronics "mask patterns" with calibre SVRF rule files 物理验证微电子“掩码模式”与口径SVRF规则文件

International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. Pub Date : 1900-01-01 DOI: 10.1109/DTIS.2006.1708685

S. Laurent

引用次数: 1

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