{"title":"Using yield models to accelerate learning curve progress","authors":"D. Dance, R. Jarvis","doi":"10.1109/ISMSS.1990.66108","DOIUrl":"https://doi.org/10.1109/ISMSS.1990.66108","url":null,"abstract":"The authors describe the application of yield models at SEMATECH to define the relative contribution of unit process steps and equipment to particle-limited yield. After validation, these detailed models can simulate the yield effects of process and equipment improvement plans. Yield models, used with short-loop defect monitors, allow immediate feedback of experiment effects to yield improvement efforts. Rapid feedback accelerates learning by bypassing normal processing cycle time delays. SEMATECH experience is used to outline methods for developing a detailed yield model, collecting manufacturing parameters, and validating results. Detailed yield models use the relationship between the learning curve and the process improvement cycle to accelerate the rate of performance-price improvement.<<ETX>>","PeriodicalId":398535,"journal":{"name":"IEEE/SEMI International Symposium on Semiconductor Manufacturing Science","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128045408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Multi site computer aided manufacturing with worldwide order book and intelligent scheduling system","authors":"S. McIntosh","doi":"10.1109/ISMSS.1990.66106","DOIUrl":"https://doi.org/10.1109/ISMSS.1990.66106","url":null,"abstract":"The author describes the implementation of a computer-aided manufacturing system and the scheduling of a worldwide order book at Plessey Semiconductors' four UK-based facilities and at the associated research facility also based in the UK. Progress in the company's US facility and offshore assembly subcontractors is covered, and the company's integrated-circuit operations from mask making through wafer fabrication, assembly, and test are discussed, with particular emphasis on intelligent scheduling of the wafer fabrication activities.<<ETX>>","PeriodicalId":398535,"journal":{"name":"IEEE/SEMI International Symposium on Semiconductor Manufacturing Science","volume":"251 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121170423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Statistical parameter control for optimum design and manufacturability of VLSI circuits","authors":"M. Bolt, J. Engel, C.L.M. v.d. Klauw, M. Rocchi","doi":"10.1109/ISMSS.1990.66118","DOIUrl":"https://doi.org/10.1109/ISMSS.1990.66118","url":null,"abstract":"A first-order statistical worst-case design methodology for VLSI products that is based on uncorrelated groups of geometry- and temperature-independent design parameters has been developed. The parameters are statistically monitored in production by extending in-line SPC (statistical process control) to PCM results. Key groups of design parameters are identified by means of a complete sensitivity analysis (including second-order terms and cross terms if necessary) on the performance parameters within the parameter windows. An estimate of the 3- sigma performance limits is then readily derived from the results of the sensitivity analysis. The uncorrelated groups of geometry- and temperature-independent design parameters have been found to be an optimum interface between process and design, making statistical design possible in a very cost-effective way. Experimental qualification of the method is discussed based on development and production data of a high-speed 1.2- mu m 64 K CMOS SRAM.<<ETX>>","PeriodicalId":398535,"journal":{"name":"IEEE/SEMI International Symposium on Semiconductor Manufacturing Science","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134136949","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Continuous flow manufacturing","authors":"G. Bowers","doi":"10.1117/12.29746","DOIUrl":"https://doi.org/10.1117/12.29746","url":null,"abstract":"CFM (continuous-flow manufacturing) combines total quality control, total people involvement, and the elimination of waste to ensure continuous attention to enhancements of manufacturing efficiency. The author provides an overview of CFM and suggests six generic areas of every manufacturing line where the CFM approach can be used. These areas are sector-by-sector analysis, setup reduction, operations improvement, pull-system WIP (work-in-process) management, process flow improvement, and defect reduction. The CFM methodology has been applied to an IBM internal business unit that manufactures photomasks used for semiconductor production. In 1984, serviceability and quality measurements in the business unit were unacceptably low and business measurements were nonexistent. CFM provided the framework for operational improvements in this unit. Presently, serviceability in the 90% to 100% range is routinely achieved. Delivery times have been more than cut in half, while superlative quality measurements have been attained. Finally, cost reductions have been realized in an environment of ever-increasing technological challenge.<<ETX>>","PeriodicalId":398535,"journal":{"name":"IEEE/SEMI International Symposium on Semiconductor Manufacturing Science","volume":"21 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114123319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Determining equipment performance using analysis of variance","authors":"L.K. Garling, G. P. Woods","doi":"10.1109/ISMSS.1990.66114","DOIUrl":"https://doi.org/10.1109/ISMSS.1990.66114","url":null,"abstract":"It is pointed out that one of the critical steps required to improve the overall quality of a wafer manufacturing operation is reducing the variability of the individual processing operations. The goal is to design a consistent method of monitoring equipment performance that samples the major sources of variation that can affect the process output. The authors discuss a statistical method that utilizes multiple types of variation (multi vari) analysis and the analysis of variance to achieve this goal. The data presented are taken from a commercially available silicon epitaxial reactor and FTIR (Fourier transform infrared spectrometry) film measurement tool, but the technique is generic and applicable to other wafer processing operations. The analysis method is presented along with some examples of the application of the calculated standard deviation and process variation. In addition to determining the performance of a piece of equipment over time, this method of analysis can be used to specify and qualify equipment. As an extension of this analysis, it is possible to determine the contribution of the measurement system to the observed variability in the process output.<<ETX>>","PeriodicalId":398535,"journal":{"name":"IEEE/SEMI International Symposium on Semiconductor Manufacturing Science","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117128839","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"AEMPES: an expert system for in-situ diagnostics and process monitoring","authors":"S.-s. Chen","doi":"10.1117/12.963949","DOIUrl":"https://doi.org/10.1117/12.963949","url":null,"abstract":"AEMPES (Advanced Electronic Materials Processing Expert System), an expert system for in-situ diagnostics and process monitoring, is being developed. This system is a key component of intelligent manufacturing equipment architecture and is intended to integrate the manufacturing line with its simulator. In the expert system, there are two interrelated subsystems: a neural network subsystem for adaptive process control, monitoring, and learning; and a rule-based subsystem for human interface and high-level AI (artificial intelligence) reasoning. Also presented is a neural network software, INNSE (Interactive Neural Network Simulation Environment).<<ETX>>","PeriodicalId":398535,"journal":{"name":"IEEE/SEMI International Symposium on Semiconductor Manufacturing Science","volume":"192 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-02-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132949693","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"IC manufacturing science in Europe","authors":"J. Monnier","doi":"10.1109/ISMSS.1990.66117","DOIUrl":"https://doi.org/10.1109/ISMSS.1990.66117","url":null,"abstract":"To reach a competitive manufacturing level, a development project has been started whose global objective is to develop concepts and to realize practical solutions to having an efficient and competitive IC industry for future submicron technology in Europe, for high-volume manufacturing as well as for custom and application-specific products. The projects focuses on the following topics: equipment engineering, automation for materials and information flow, clean room technology, mask making techniques, quality control, material supply, and industrial engineering. The major issue of the last item, short cycle time manufacturing, is explained, along with the concepts implemented for achieving desired results. After a few months, cycle times as short as two weeks have been reached, and a short cycle time culture has been spread in the company.<<ETX>>","PeriodicalId":398535,"journal":{"name":"IEEE/SEMI International Symposium on Semiconductor Manufacturing Science","volume":"386 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133323874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}