Pete Cooper, Uwe Dolinsky, A. Donaldson, A. Richards, C. Riley, G. Russell
{"title":"Offload - Automating Code Migration to Heterogeneous Multicore Systems","authors":"Pete Cooper, Uwe Dolinsky, A. Donaldson, A. Richards, C. Riley, G. Russell","doi":"10.1007/978-3-642-11515-8_25","DOIUrl":"https://doi.org/10.1007/978-3-642-11515-8_25","url":null,"abstract":"","PeriodicalId":394008,"journal":{"name":"International Conference on High Performance Embedded Architectures and Compilers","volume":"217 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115178536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Boubacar Diouf, Albert Cohen, F. Rastello, John Cavazos
{"title":"Split Register Allocation: Linear Complexity Without the Performance Penalty","authors":"Boubacar Diouf, Albert Cohen, F. Rastello, John Cavazos","doi":"10.1007/978-3-642-11515-8_7","DOIUrl":"https://doi.org/10.1007/978-3-642-11515-8_7","url":null,"abstract":"","PeriodicalId":394008,"journal":{"name":"International Conference on High Performance Embedded Architectures and Compilers","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125471745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Performance and Power Aware CMP Thread Allocation Modeling","authors":"Y. Ben-Itzhak, I. Cidon, A. Kolodny","doi":"10.1007/978-3-642-11515-8_18","DOIUrl":"https://doi.org/10.1007/978-3-642-11515-8_18","url":null,"abstract":"","PeriodicalId":394008,"journal":{"name":"International Conference on High Performance Embedded Architectures and Compilers","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131479194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Ferrer, Vicencc Beltran, Marc González, X. Martorell, E. Ayguadé
{"title":"Analysis of Task Offloading for Accelerators","authors":"R. Ferrer, Vicencc Beltran, Marc González, X. Martorell, E. Ayguadé","doi":"10.1007/978-3-642-11515-8_24","DOIUrl":"https://doi.org/10.1007/978-3-642-11515-8_24","url":null,"abstract":"","PeriodicalId":394008,"journal":{"name":"International Conference on High Performance Embedded Architectures and Compilers","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133332246","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Ferri, Samantha Wood, T. Moreshet, Iris Bahar, M. Herlihy
{"title":"Energy and Throughput Efficient Transactional Memory for Embedded Multicore Systems","authors":"C. Ferri, Samantha Wood, T. Moreshet, Iris Bahar, M. Herlihy","doi":"10.1007/978-3-642-11515-8_6","DOIUrl":"https://doi.org/10.1007/978-3-642-11515-8_6","url":null,"abstract":"","PeriodicalId":394008,"journal":{"name":"International Conference on High Performance Embedded Architectures and Compilers","volume":"580 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115852233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Homayoun, Aseem Gupta, A. Veidenbaum, Avesta Sasan, F. Kurdahi, N. Dutt
{"title":"RELOCATE: Register File Local Access Pattern Redistribution Mechanism for Power and Thermal Management in Out-of-Order Embedded Processor","authors":"H. Homayoun, Aseem Gupta, A. Veidenbaum, Avesta Sasan, F. Kurdahi, N. Dutt","doi":"10.1007/978-3-642-11515-8_17","DOIUrl":"https://doi.org/10.1007/978-3-642-11515-8_17","url":null,"abstract":"","PeriodicalId":394008,"journal":{"name":"International Conference on High Performance Embedded Architectures and Compilers","volume":"202 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117099128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SRP: Symbiotic Resource Partitioning of the Memory Hierarchy in CMPs","authors":"Shekhar Srikantaiah, M. Kandemir","doi":"10.1007/978-3-642-11515-8_21","DOIUrl":"https://doi.org/10.1007/978-3-642-11515-8_21","url":null,"abstract":"","PeriodicalId":394008,"journal":{"name":"International Conference on High Performance Embedded Architectures and Compilers","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125425612","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Larrabee: A Many-Core Intel Architecture for Visual Computing","authors":"R. Espasa","doi":"10.1007/978-3-642-11515-8_2","DOIUrl":"https://doi.org/10.1007/978-3-642-11515-8_2","url":null,"abstract":"","PeriodicalId":394008,"journal":{"name":"International Conference on High Performance Embedded Architectures and Compilers","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128033219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Multi-level Hardware Prefetching Using Low Complexity Delta Correlating Prediction Tables with Partial Matching","authors":"Marius Grannæs, Magnus Jahre, L. Natvig","doi":"10.1007/978-3-642-11515-8_19","DOIUrl":"https://doi.org/10.1007/978-3-642-11515-8_19","url":null,"abstract":"","PeriodicalId":394008,"journal":{"name":"International Conference on High Performance Embedded Architectures and Compilers","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122121098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Rainer Ohlendorf, Michael Meitinger, Thomas Wild, A. Herkersdorf
{"title":"An Application-Aware Load Balancing Strategy for Network Processors","authors":"Rainer Ohlendorf, Michael Meitinger, Thomas Wild, A. Herkersdorf","doi":"10.1007/978-3-642-11515-8_13","DOIUrl":"https://doi.org/10.1007/978-3-642-11515-8_13","url":null,"abstract":"","PeriodicalId":394008,"journal":{"name":"International Conference on High Performance Embedded Architectures and Compilers","volume":"2 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131465133","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}