2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum最新文献_第2页

Reconfigurable Designs for Networking Silicon 网络芯片的可重构设计

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum Pub Date : 2012-05-21 DOI: 10.1109/IPDPSW.2012.35

Tao Li, Zhentao Liu, Huimin Du, Lei Zhang, Jungang Han, Lin Jiang, Qingang Dong

引用次数: 1

Model-Driven Approach for Automatic Dynamic Partially Reconfigurable IP Customization 自动动态部分可重构IP自定义的模型驱动方法

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum Pub Date : 2012-05-21 DOI: 10.1109/IPDPSW.2012.51

G. Ochoa-Ruiz, Ouassila Labbani, E. Bourennane, Philippe Soulard

{"title":"Model-Driven Approach for Automatic Dynamic Partially Reconfigurable IP Customization","authors":"G. Ochoa-Ruiz, Ouassila Labbani, E. Bourennane, Philippe Soulard","doi":"10.1109/IPDPSW.2012.51","DOIUrl":"https://doi.org/10.1109/IPDPSW.2012.51","url":null,"abstract":"This paper presents a framework which automates the generation of DPR capable IP cores. The approach is based in an MDE methodology, which exploits two widely used standards for Systems-on-Chip specification, UML/MARTE and IP-XACT. The approach aims at generating IPs which incorporate different functionalities by using code templates. The templates correspond to IP-XACT components that represent VHDL modules to be implemented in the IP. The IP-XACT sub-system description is generated from the MARTE description, effectively diminishing the complexity of creating this kind of systems by increasing the level of abstraction. We present the MARTE modeling concepts and how these models are mapped to IP-XACT objects, the emphasis is given to the generation of IP cores that can be used in the Xilinx EDK environment, since we aim to develop a complete flow around their Dynamic Partial Reconfiguration design flow. A model for the DPR IP is presented and a case study for a simple IP is presented. The use of our MDE approach is introduced to demonstrate how the generation from MARTE to EDK systems is performed.","PeriodicalId":378335,"journal":{"name":"2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117274305","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Optimizing the Execution of Statistical Simulations for Human Evolution in Hyper-threaded Multicore Architectures 在超线程多核架构中优化人类进化统计模拟的执行

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum Pub Date : 2012-05-21 DOI: 10.1109/IPDPSW.2012.87

R. Dias, C. Rose, A. A. Gomes, N. J. Fagundes

{"title":"Optimizing the Execution of Statistical Simulations for Human Evolution in Hyper-threaded Multicore Architectures","authors":"R. Dias, C. Rose, A. A. Gomes, N. J. Fagundes","doi":"10.1109/IPDPSW.2012.87","DOIUrl":"https://doi.org/10.1109/IPDPSW.2012.87","url":null,"abstract":"Simulations of statistical models have been used to validate theories of past events in evolution of species. Studies concerning human evolution are important for understanding about our history and biodiversity. However, these approaches use complex statistical models, leading to high computational cost. The present paper proposes optimization techniques for Hyper-threaded multicore architectures to improve the computational performance of these simulations. Combining granularity studies and Hyper-threading optimization, we improved the performance of simulations in more than 30%, if compared with common parallel execution (default parallelization applied by users). The performance was evaluated using a complex example of human evolution studies [1]. For this example, our techniques enable the user to decrease the simulation execution time from 50 days (sequential runtime) to less than 5 days. In addition, the evaluation has been extended for simulations running on multiple multicore cluster nodes. Our measurements show a high Speed-up, close to theoretical maximum, being 129 times faster for 160 computational cores. This represents an efficiency of 81%.","PeriodicalId":378335,"journal":{"name":"2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129431432","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

An Analysis of Multicore Specific Optimization in MPI Implementations MPI实现中的多核特定优化分析

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum Pub Date : 2012-05-21 DOI: 10.1109/IPDPSW.2012.231

Pengqi Cheng, Yan Gu

引用次数: 1

MTSD: A Task Scheduling Algorithm for MapReduce Base on Deadline Constraints 基于时间约束的MapReduce任务调度算法

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum Pub Date : 2012-05-21 DOI: 10.1109/IPDPSW.2012.250

Zhuo Tang, Junqing Zhou, Kenli Li, Ruixuan Li

{"title":"MTSD: A Task Scheduling Algorithm for MapReduce Base on Deadline Constraints","authors":"Zhuo Tang, Junqing Zhou, Kenli Li, Ruixuan Li","doi":"10.1109/IPDPSW.2012.250","DOIUrl":"https://doi.org/10.1109/IPDPSW.2012.250","url":null,"abstract":"The previous works about MapReduce task scheduling with deadline constraints neither take the diffenences of Map and Reduce task, nor the cluster's heterogeneity into account. This paper proposes an extensional MapReduce Task Scheduling algorithm for Deadline constraints in Hadoop platform: MTSD. It allows user specify a job's deadline and tries to make the job be finished before the deadline. Through measuring the node's computing capacity, a node classification algorithm is proposed in MTSD. This algorithm classifies the nodes into several levels in heterogeneous clusters. Under this algorithm, we firstly illuminate a novel data distribution model which distributes data according to the node's capacity level respectively. The experiments show that the data locality is improved about 57%. Secondly, we calculate the task's average completion time which is based on the node level. It improves the precision of task's remaining time evaluation. Finally, MTSD provides a mechanism to decide which job's task should be scheduled by calculating the Map and Reduce task slot requirements.","PeriodicalId":378335,"journal":{"name":"2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123885793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 28

Different Approaches to Distributed Compilation 分布式编译的不同方法

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum Pub Date : 2012-05-21 DOI: 10.1109/IPDPSW.2012.137

J. Gattermayer, P. Tvrdík

{"title":"Different Approaches to Distributed Compilation","authors":"J. Gattermayer, P. Tvrdík","doi":"10.1109/IPDPSW.2012.137","DOIUrl":"https://doi.org/10.1109/IPDPSW.2012.137","url":null,"abstract":"Source code compiling is a non-trivial task that requires many computing resources. As a software project grows, its build time increases and debugging on a single computer becomes more and more time consuming task. An obvious solution would be a dedicated cluster acting as a build farm, where developers can send their requests. But in most cases, this solution has a very low utilization of available computing resources which makes it very ineffective. Therefore, we have focused on non-dedicated clusters to perform distributed compilation, where we could use users' computers as nodes of a build farm. We compare two different approaches: distcc, which is an open-source program to distribute compilation of C/C++ code between several computers on a network and Clondike, which is a universal peer-to-peer cluster that is being developed at the Czech Technical University in Prague. A very complex task able to test deeply both systems is a compilation of a Linux Kernel with many config options. We have run this task on a cluster with up to 20 computers and have measured computing times and CPU loads. In this paper, we will present the results of this experiment that indicate the scalability and utilization of given resources in both systems. We also discuss the penalty of a generic solution over a task-specific one.","PeriodicalId":378335,"journal":{"name":"2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123315842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

A MapReduce-based Algorithm for Motif Search 基于mapreduce的Motif搜索算法

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum Pub Date : 2012-05-21 DOI: 10.1109/IPDPSW.2012.255

Hongwei Huo, Shuai Lin, Qiang Yu, Yipu Zhang, V. Stojkovic

引用次数: 3

Area-Efficient FPGA Implementation of Quadruple Precision Floating Point Multiplier 四倍精度浮点乘法器的面积高效FPGA实现

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum Pub Date : 2012-05-21 DOI: 10.1109/IPDPSW.2012.46

M. Jaiswal, R. Cheung

引用次数: 8

A System for GIS Polygonal Overlay Computation on Linux Cluster - An Experience and Performance Report 基于Linux集群的GIS多边形叠加计算系统——经验与性能报告

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum Pub Date : 2012-05-21 DOI: 10.1109/IPDPSW.2012.180

Dinesh Agarwal, S. Puri, Xi He, S. Prasad

引用次数: 42

Placement Strategy of Virtual Machines Based on Workload Characteristics 基于工作负载特征的虚拟机布局策略

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum Pub Date : 2012-05-21 DOI: 10.1109/IPDPSW.2012.264

Jian Wan, Fei Pan, Congfeng Jiang

引用次数: 5