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Motion detection of vehicles based on FPGA 基于FPGA的车辆运动检测
2010 VI Southern Programmable Logic Conference (SPL) Pub Date : 2010-03-24 DOI: 10.1109/SPL.2010.5483022
G. Menezes, A. Silva-Filho
{"title":"Motion detection of vehicles based on FPGA","authors":"G. Menezes, A. Silva-Filho","doi":"10.1109/SPL.2010.5483022","DOIUrl":"https://doi.org/10.1109/SPL.2010.5483022","url":null,"abstract":"In this paper a hardware approach for evaluating motion detection of vehicles on transit roads was proposed. A motion detection method is used through computational vision with a fixed camera which is based on the difference between the current image and a reference image of the environment that is being monitored. Results are compared with a software approach in order to validate and show the effectiveness of a hardware approach. Experiments based on real vehicle images in roads were performed and results are 7.5 times faster by using a reconfigurable hardware approach as compared to the same application in a software approach. The results were also compared with another hardware approach for motion detection and a performance improvement of about 66% was observed in the image processing.","PeriodicalId":372692,"journal":{"name":"2010 VI Southern Programmable Logic Conference (SPL)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132099138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Rec-Bench: A tool to create benchmark for reconfigurable computers Rec-Bench:为可重构计算机创建基准的工具
2010 VI Southern Programmable Logic Conference (SPL) Pub Date : 2010-03-24 DOI: 10.1109/SPL.2010.5483012
M. Fazlali, A. Zakerolhosseini
{"title":"Rec-Bench: A tool to create benchmark for reconfigurable computers","authors":"M. Fazlali, A. Zakerolhosseini","doi":"10.1109/SPL.2010.5483012","DOIUrl":"https://doi.org/10.1109/SPL.2010.5483012","url":null,"abstract":"Over the last decade, significant attempts have been made to employ reconfigurable computers to accelerate the computation intensive parts (tasks) of the multimedia applications. However, shareing the reconfigurable fabric between computing processes is an important issue and therefore, several design time and runtime mechanisms have been proposed to tackle this problem. One of the basic requirements in these approaches is a real application workload with which the performance of the proposed approach can be measured. Vast majority of previous researches have been evaluated using random generated task sets or one real hardware implementation per task. In this paper, to convince this weakness, we present Reconfigurable Benchmark (Rec-Bench), a tool to create benchmark suite for reconfigurable computers. The result of applying runtime task scheduling algorithms to the benchmarks in Rec-Bench and random generated tasks justifies the usefulness of using Rec-Bench for the evaluation of runtime resource management algorithm in reconfigurable computers.","PeriodicalId":372692,"journal":{"name":"2010 VI Southern Programmable Logic Conference (SPL)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132024453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
FPGA hierarchical architecture for a Positron Emission Tomography Scanner 正电子发射断层扫描仪的FPGA分层结构
2010 VI Southern Programmable Logic Conference (SPL) Pub Date : 2010-03-24 DOI: 10.1109/SPL.2010.5483028
D. Estryk, C. Verrastro, S. Marinsek, M. Belzunce, E. Venialgo
{"title":"FPGA hierarchical architecture for a Positron Emission Tomography Scanner","authors":"D. Estryk, C. Verrastro, S. Marinsek, M. Belzunce, E. Venialgo","doi":"10.1109/SPL.2010.5483028","DOIUrl":"https://doi.org/10.1109/SPL.2010.5483028","url":null,"abstract":"In this work, the AR-PET architecture is introduced and described. Its data acquisition system is composed of four layers of data processing with the purpose of computing the parameters as soon as possible to reduce data bandwidth for the next layer. FPGAs were used as main processing devices for the first three layers. The first layer computes pulse energy and timestamp, the second layer computes planar coordinates and the third layer does electronic collimation and spatial line of response computation. Some important issues, like time synchronization, data flow, trigger technique, configuration and programming buses are explained. The developed architecture was proved to be effective for PET scanner implementations.","PeriodicalId":372692,"journal":{"name":"2010 VI Southern Programmable Logic Conference (SPL)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129688901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Ring oscillators as thermal sensors in FPGAs: Experiments in low voltage 环形振荡器在fpga中的热传感器:低电压实验
2010 VI Southern Programmable Logic Conference (SPL) Pub Date : 2010-03-24 DOI: 10.1109/SPL.2010.5483027
J. L. Franco, E. Boemo, Encarnación Castillo, L. Parrilla
{"title":"Ring oscillators as thermal sensors in FPGAs: Experiments in low voltage","authors":"J. L. Franco, E. Boemo, Encarnación Castillo, L. Parrilla","doi":"10.1109/SPL.2010.5483027","DOIUrl":"https://doi.org/10.1109/SPL.2010.5483027","url":null,"abstract":"In this paper, some experiments about thermal sensors based on ring-oscillator in low-voltage Virtex series FPGAs are presented. A non linear effect in the frequency-temperature response has been detected, and the sensibility of frequency with respect to voltage variations is greater than the measured in previous works. A quadratic polynomial function fits better the sensor response, and an increment in the number of inverters in the oscillator is effective to reduce the voltage sensibility.","PeriodicalId":372692,"journal":{"name":"2010 VI Southern Programmable Logic Conference (SPL)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125603014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 57
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