2021 IEEE International Solid- State Circuits Conference (ISSCC)最新文献

{"title":"A High-Conversion-Ratio and 97.4% Peak-Efficiency 3-Switch Boost Converter with Duty-Dependent Charge Topology for 1.2A High Driving Current and 20% Reduction of Inductor DC Current in MiniLED Applications","authors":"Yen-An Lin, Si-Yi Li, Zheng-Lun Huang, Chong-Sin Huang, Chin-Hsiang Liang, Kai-Syun Chang, Kai-Cheng Chung, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai","doi":"10.1109/ISSCC42613.2021.9365797","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365797","url":null,"abstract":"Today’s miniLED displays can be divided into multiple arrays. Each miniLED array with 900 pixels can have 60 channels where each channel has 15 LEDs connected in series. To drive multi-channel miniLEDs in parallel from a low input voltage $mathrm{V}_{mathrm{I}mathrm{N}}$(=6V), a boost converter with high output voltage (up to 30V) and high output current (up to 1. 2A for 2000 nits) is required where the conversion ratio (CR $=mathrm{V}_{0cup mathrm{T}}/mathrm{V}_{mathrm{I}mathrm{N}}$) is 5. Since the inductor current $I_{L}=I_{LOAD}/(1-D)$ of the conventional 2-switch (2S) boost converter is high, where $mathrm{I}_{mathrm{L}0mathrm{A}mathrm{D}}$ is the load current and D is the duty cycle, 2S boost converters have low efficiency and high output voltage ripple. AIthough the boost converter assisted by a series flying capacitor $mathrm{C}_{mathrm{F}}$ can reduce the inductor current level to improve efficiency [1] –[5], $mathrm{C}_{mathrm{F}}$ lacks energy under high CR and high loading conditions. At the top of Fig. 17.9.1, both techniques in [1] and [2] charge the $mathrm{C}_{mathrm{F}}$ during $varphi$ 2. ln case of high CR, the duration of $varphi$ 2 becomes small to seriously affect the charging time. Hence, due to insufficient charge stored in $mathrm{C}_{mathrm{F}}$, the driving capability will decrease. At no load (left of Fig. 17.9.2), [1] fails to regulate and D is 0.87 in [2] to haveCR=5. lnterestingly, both$$ [1] and [2] fail to have CR=5 at load current =1.2A. AIthough additional dual channel-interleaved three-level buck-boost (DTLBB) structure in [1] can alternatively charge two flying capacitors, the hardware overhead is double and the quiescent current becomes high.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115286408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"7.2 A 48 ×4013.5 mm Depth Resolution Flash LiDAR Sensor with In-Pixel Zoom Histogramming Time-to-Digital Converter","authors":"Bumjun Kim, Seonghyeok Park, J. Chun, Jaehyuk Choi, Seong-Jin Kim","doi":"10.1109/ISSCC42613.2021.9366022","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9366022","url":null,"abstract":"3D imaging technologies have become prevalent for diverse applications such as user identification, interactive user interfaces with AR/VR devices, and self-driving cars. Direct time-of-flight (D-ToF) systems, LiDAR sensors, are desirable for long-distance measurements in outdoor environments because they offer high sensitivity to weak reflected light and high immunity to background light thanks to the spatiotemporal correlation of SPADs [1], [2]. SPAD-based LiDAR sensors suffer from a large amount of ToF data generated by complicated time-to-digital converters (TDC), resulting in limited spatial resolution and frame rate compared with indirect ToF (I-ToF) sensors. Recently, LiDAR sensors embedding histogramming TDCs have been reported to generate depth information to reduce the required output bandwidth [3]–[6]. However, they still adopt a large number of memories in pixel, a complicated signal processor, or a column-parallel TDC scheme with scanning optics.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114381296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"2.1 mm-Wave 5G Radios: Baseband to Waves","authors":"Ahmed Khalil, I. Eshrah, Amr Elsherief, A. Mehana, M. Abdalla, Mohamed Mobarak, J. Kilpatrick, Brian Hall, A. Ashry, H. Fahmy, Sherif Salim, Russell Kernan, Brian Herdeg, Gary Sapia, M. El-Nozahi, M. Weheiba, Mark D’Amato, C. Bautista, Kasey Chatzopoulos, A. Ghoniem, Yossif Mosa, Daniel Roll, Kerem Ok","doi":"10.1109/ISSCC42613.2021.9365980","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365980","url":null,"abstract":"There are many challenges in building millimeter-Wave (mmW) 5G radios [1] –[3]. Some of the key challenges are the cost, heat dissipation, and array calibration. This paper describes ADI’s full line-up of mmW 5G radios used today, with a focus on the millimeter wave front-end portion, and how it addresses some of these challenges. The radio block diagram, shown in Fig. 2.1.1, is an example of a dual-polarized 24-to-30GHz band mmW radio. All ICs in this radio cover 24 to 30GHz, allowing the same chips to be used in n257, n258, and n261 radios, which reduces the development cost. The radio consists of two domains: BB-IF and mmW. The BB-IF domain contains either an IF transceiver utilizing quadrature baseband data converters and mixers to generate the IF, or data converters (MxFE) to directly synthesize the IF. The former is optimal for narrower bandwidth applications while the latter consumes more power but can support higher bandwidths. The mmW domain consists of a mmW Up/Down converter and a 16-channel, (2 polarizations $times 8$ channels per pol) high-performance beamformer (BF). The mmW chips utilize a 45nm RF SOI process, which is optimized for RF performance at the mmW 5G bands. The SOI process is a 12-inch process, hence economically suitable for large-volume applications. The BF linear output power is 12dBm/channel @ 3% EVM using a 400MHz 5G NR waveform. The channel P1dB is 20dBm. Two mmW BFs, cover 24-to-30 and 37-to-44GHz bands, respectively. An implementation of the mmW front-end, consisting of 128 dual-polarized antenna elements, 16 BFs, 4 Up/Down frequency converters (UDCs), and the power-management circuitry has been fabricated and is shown in Fig. 2.1.2. Over-the-air (OTA) measurement results of the fabricated array are presented below. The measurements include the radiation pattern, EIRP, linearity, and combined throughput of four streams. The paper also discusses the following: OTA Performance of ADI’s mmW 5G radios, antenna performance and design aspects, thermal aspects and heat dissipation modelling, and calibration of mmW radios.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114811096","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"270-to-300GHz Double-Balanced Parametric Upconverter Using Asymmetric MOS Varactors and a Power-Splitting- Transformer Hybrid in 65nm CMOS","authors":"Zhiyu Chen, W. Choi, K. O. Kenneth","doi":"10.1109/ISSCC42613.2021.9365953","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365953","url":null,"abstract":"Wireless communication at $sim 300$ GHz is drawing attention due to its potential to support a high data-rate using the wide available bandwidth. Transmitters operating at $sim 300$ GHz have been reported in [1] –[5]. In order to support the high-order modulation, high datarate, and an increased range, the transmitter must have a high output 1dB compression point (OP $_{1dB})$ and a wide bandwidth. Unfortunately, instead of OP1dB, only the saturated output power levels, ${P}_{sat}$, of the CMOS transmitters $[3- 5] _{}$ are reported. A 272GHz CMOS amplifier has been reported in [6], but it only achieves an OP1dB of -10.18dBm and a 3dB bandwidth of less than 5GHz. Broadband power amplification at 300GHz in CMOS is not practical since the transistor fmax is $sim 350$ GHz or less. Due to this, the CMOStransmitter linear output power is limited by the upconversion mixer OP1dB. Unfortunately, the mixers operating near 300GHz suffer from low conversion gain (CG) and OP1dB.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127448286","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"21.4 A 0.75-to-1GHz Passive Wideband Noise-Cancelling 171µW Wake-Up RX and 440µW Primary RX FE with -86dBm/10kb/s Sensitivity, 35dB SIR and 3.8dB RX NF","authors":"Hayden Bialek, Sohail Ahasan, Ali Binaie, Kamala Raghavan Sadagopan, M. Johnston, H. Krishnaswamy, A. Natarajan","doi":"10.1109/ISSCC42613.2021.9365817","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365817","url":null,"abstract":"IoT transceiver deployments are envisioned to have low power, low data-rate ($sim$kb/s) wake-up receive (WuRX) and Mb/s primary receive (RX) modes for long battery lifetimes [1]. WuRX architectures based on energy-detection (ED) achieve ultra-low power (ULP) C0nsumpti0n but have poor sensitivities ($sim-$60 to -40dBm) for <lms latency [2]–[5] and are susceptible to modulated interferers without passive high-Q RF filtering [6]–[9]. While modulated-interferer tolerance is critical for practical deployments, high-Q RF filtering severely limits operating frequency range, making it challenging to operate across region-specific spectrum allocations and temperature/process variations. Mixer-first uncertain-IF RX can potentially improve operating frequency range and interferer tolerance [10]. However, if the relatively high NF is mitigated using frequency-selective passive RF voltage gain, frequency operation range is again limited. Finally, the antenna must be shared between the primary RX, WuRX and potentially the TX in such ULP radios making it challenging to share the high-Q WuRX matching network with the full-band primary radio. This paper presents a low-power hybrid-coupler based mixer-first noise-cancelling RX that supports a wideband shared antenna interface for the primary and WuRX while also providing passive voltage gain and achieves (i) wide L0-defined operating bandwidth (0. 75GHz to 1GHz) in both primary and wake-up modes, (ii) interferer-tolerance for the wake-up RX (>26dB Signal-to-Interference Ratio (SIR) at 2MHz offset for4Mb/s OPSK interferer) and high-linearity in the primary RX (0.75dBm IP<inf>1dB</inf>) and (iii)high-sensitivity in both wake-up (-86dBm) and primary RX (3.8dB NF) modes through noise cancelling, while consuming 171uW in wake-up RX mode (including RF L0) and 440uWin primary RX mode.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124365618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 189x600 Back-Illuminated Stacked SPAD Direct Time-of-Flight Depth Sensor for Automotive LiDAR Systems","authors":"O. Kumagai, Junichi Ohmachi, M. Matsumura, Shinichiro Yagi, Kenichi Tayu, Keitaro Amagawa, T. Matsukawa, O. Ozawa, Daisuke Hirono, Y. Shinozuka, Ryutaro Homma, K. Mahara, Toshio Ohyama, Yousuke Morita, Shohei Shimada, T. Ueno, A. Matsumoto, Y. Otake, T. Wakano, Takashi Izawa","doi":"10.1109/ISSCC42613.2021.9365961","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365961","url":null,"abstract":"There have been many developments in Light Detection And Ranging (LiDAR) sensors used in Autonomous Driving (AD) and Advanced Driver Assistance Systems (ADAS) to measure the precise distance to an object, recognize the shape of an intersection, and classify road types. These LiDAR sensors can achieve fantastic results day and night without any loss of performance. In the past, Time-Correlated Single Photon Counting (TCSPC) and complete digital signal processing (DSP) have been used in to achieve a 100m range Time-of-Flight (ToF) sensor [1]. Background (BG) noise-rejection techniques [2] have been used to improve the signal-to-noise ratio (SNR), leading to detection of objects at a 6km range. Single Photon Avalanche Diode (SPAD)-based architectures implement per-pixel level histogramming, Time-to-Digital Conversion (TDC) and signal processing [3], [4]. Another ToF sensor has been shown that enables significantly higher resolution, $1200 times 900$ pixels [5]. With the emerging need for a highresolution solid-state LiDAR using a scanning 2D-SPAD array [6], we report a SPAD direct Time-of-Flight (dToF) depth sensor [1] –[5] to realize long-distance 300m range and high resolution over an automotive-grade temperature range of -40 to $125 ^{circ}{C}$. This microelectromechanical systems (MEMS)-based SPAD LiDAR can measure over ranges up to 150m with 0.1% accuracy for a 10%-reflectivity target and 200m with 0.1% accuracy for a 95%-reflectivity target. This paper presents a back-illuminated stacked SPAD dToF depth sensor deployed with passive quenching and recharge (PQR) frontend circuitry, TCSPC, and on-chip DSP. Under 117klux sunlight conditions, the MEMS-based SPAD LiDAR measures distances up to 200m with $168 times 63$ resolution at 20 frames/s.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124417824","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 112Gb/s PAM-4 Low-Power 9-Tap Sliding-Block DFE in a 7nm FinFET Wireline Receiver","authors":"James Bailey, H. Shakiba, Ehud Nir, Grigory Marderfeld, Peter Krotnev, Marc-Andre LaCroix, D. Cassan","doi":"10.1109/ISSCC42613.2021.9365853","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365853","url":null,"abstract":"Recent advances in ADCs have enabled DSP-based equalization (e.g. extensive FFE and DFE) of wireline channels. FFE and canonical DFE sizes scale linearly with the number of taps, however the computational complexity of an FFE is much greater than that of a DFE. The canonical DFE is challenged by timing closure, and necessary techniques to ease it result in exponential growth in size. As a result, the majority of state-of-the-art DFE implementations have been limited to only 1-2 taps [1–4]. In this paper, a sliding-block DFE (SB-DFE) is introduced that enables pipelining and breaks the barrier to implementing much longer DFEs. Consequently, the DFE length can be extended to encompass all postcursors. Unlike FFEs, DFEs do not amplify noise. Moreover, a long DFE can relax or even remove the postcursor equalization burden on the CTLE and FFE, saving area and power.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124995635","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"31.2 A 0.9V 28MHz Dual-RC Frequency Reference with 5pJ/Cycle and ±200 ppm Inaccuracy from -40°C to 85°C","authors":"Woojun Choi, J. Angevare, Injun Park, K. Makinwa, Youngcheol Chae","doi":"10.1109/ISSCC42613.2021.9366021","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9366021","url":null,"abstract":"Wireless sensor nodes in battery-powered internet-of-things (loT) applications require a stable on-chip frequency reference with low energy (<10 pJ / cycle) and high frequency stability (below $pm 300 ppm$). CMOS RC frequency references are promising due to their low-cost integration and high energy efficiency [1] –[5]. Conventional RC references, however, achieve only moderate accuracy (a few %) due to the large temperature coefficient (TC) of on-chip resistors [3]. First-order TC compensation can be achieved by combining resistors with complementary TCs [1], [2]. Although this is energy efficient (<6 pJ / cycle), it only partially compensates for the resistors’ high-order TCs, limiting the resulting accuracy to about ±500 ppm. Better accuracy $(pm 100$ ppm [4]) can be achieved by using the output of a digital temperature sensor (TS) to perform a polynomial correction of the phase-shift $left(mu_{p, T}right)$ of an RC filter (Fig. 31.2.1). Alternatively, the phaseshifts $left(mu_{p}right.$. and $left.mu_{N}right)$ of two RC filters with complementary TCs can be linearized $left(T_{p}right.$. and TN) and combined in the digital domain. Such dual-RC frequency references can also achieve good accuracy $(pm 200$ ppm [5]). However, both architectures employ an analog phase-domain $Delta Sigma$ modulator $left(Phi-Delta Sigma Mright)$ for each RC filter, which consumes significant energy $(25 pJ / cycle$ [4] and $107 pJ /$ cycle [5]) and area $left(0.3 mm^{2}[4]right.$. and $left.1.65 mm^{2}[5]right)$.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"140 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123293512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"17.7 A 0.03mV/mA Low Crosstalk and 185nA Ultra-Low-Quiescent Single-Inductor Multiple-Output Converter Assisted by 5-Input Operational Amplifier for 94.3% Peak Efficiency and 3.0W Driving Capability","authors":"Tzu-Hsien Yang, Yong-Hwa Wen, Yu-Jheng Ou Yang, Chun-Kai Chiu, Bo Wu, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai","doi":"10.1109/ISSCC42613.2021.9365976","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365976","url":null,"abstract":"The single-inductor multi-output (SIMO) converter offers the advantage of small size and can provide distributive voltage/current for wearable electronic devices. However, there are still some design challenges to solve. In continuous-conduction-mode (CCM) control, it is difficult to reduce crosstalk between multiple outputs [1– 5]. Any crosstalk will result in excessive or insufficient energy in other outputs, resulting in severe voltage ripple. In the upper left of Fig. 17.7.1, when there is any load change on $mathrm{V}_{O2}$, crosstalk will occur at $mathrm{V}_{O1}$ and $mathrm{V}_{O4}$. On the other hand, in the discontinuous-conduction-mode (DCM) control [6, 7], if any one of the multiple outputs changes from light load to heavy load, serious crosstalk occurs due to the extension of the switching period $mathrm{T}_{SW}$, as shown in the upper right of Fig. 17.7.1. Although constant frequency control can avoid the expansion of $mathrm{T}_{SW}$ [8], the limited peak inductor current will reduce the driving capability $(mathrm{I}_{LOAD(MAX)} quad =100$ mA [8]). In this paper, the proposed SIMO converter, shown at the bottom left of Fig. 17.7.1, uses an adaptive switchable CCM and DCM (ASCD) technique that takes advantage of the high driving capability of CCM and the advantage of reducing crosstalk in DCM under light loads. To effectively reduce the crosstalk in CCM (Mode1 in this paper), a 5-input crosstalk-reduction error amplifier (CREA) with a feedback rotator is proposed to reduce the shortcomings of hardware overhead in [1– 10]. For achieving low crosstalk and high driving capability under medium load, the SIMO converter works in a combination of stacked DCM and sequential DCM, which are classified as Mode2 to Mode4 to change the energy distribution path of each output (Fig. 17.7.1 bottom right). Under ultra-light load conditions, the switching cycle $mathrm{T}_{SW}$ can be extended to reduce switching power loss, and SIMO will enter the ultra-low-power (ULP) mode (Mode5) to further reduce the quiescent current and increase the battery runtime.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126267654","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Fully Integrated 62-to-69GHz Crystal-Less Transceiver with 12 Channels Tuned by a Transmission-Line- Referenced FLL in 0.13µm BiCMOS","authors":"Jaeho Im, Hyeongseok Kim, Omar Abdelatty, D. Wentzloff","doi":"10.1109/ISSCC42613.2021.9365827","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365827","url":null,"abstract":"The progress towards smaller Wireless Sensor Networks (WSNs) has expanded the applications for ubiquitous sensing. However, the form-factor of a WSN is typically limited by bulky off-chip components, mainly the crystal reference and antenna. Recent work has focused on removing the crystal by recovering the reference from a received RF signal [1], replacing the crystal with an external FBAR resonator [2], using an open-loop oscillator and compensating frequency drift at the gateway [3], or using an on-chip patch antenna for a reference [4]. This paper presents a fully integrated crystal-less TRX that supports node-to-node communication across 12 channels using an integrated transmission line as a reference to lock and tune the RF frequency. The integrated 3-port slot antenna supports TX and RX modes without a TRX switch. The on-off keyed (OOK)-based uncertain IF TRX architecture enables node-to-node communication with 16dB channel selectivity, with no external components required. The chip area is minimized by reusing the active area underneath the passive devices for baseband circuits.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130569304","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}