Sungpack Hong, S. Yoo, Sheayun Lee, Sangwoo Lee, Hye Jeong Nam, Bum-Seok Yoo, Jaehyung Hwang, D. Song, Jang-Han Kim, Jeong-Yeol Kim, HoonSang Jin, Kyu-Myung Choi, J. Kong, Soo-Kwan Eo
{"title":"Creation and utilization of a virtual platform for embedded software optimization:: an industrial case study","authors":"Sungpack Hong, S. Yoo, Sheayun Lee, Sangwoo Lee, Hye Jeong Nam, Bum-Seok Yoo, Jaehyung Hwang, D. Song, Jang-Han Kim, Jeong-Yeol Kim, HoonSang Jin, Kyu-Myung Choi, J. Kong, Soo-Kwan Eo","doi":"10.1145/1176254.1176311","DOIUrl":"https://doi.org/10.1145/1176254.1176311","url":null,"abstract":"Virtual platform (ViP), or ESL (electronic system level) simulation model, is one of the most widely renowned system level design techniques. In this paper, we present a case study of creating and applying the ViP in the development of a new hard disk system called hybrid-HDD that is one of the main features in the Windows VISTA (R). First, we summarize how we developed the ViP including the levels of timing accuracy of models, automatic generation of models from RTL code, external subsystem models, etc. Then, we explain how we exploited the ViP in software optimization. Compared with the conventional flow of software development, e. g. based on the real board, the ViP gives a better profiling capability thereby allowing designers to find more chances of code optimization. Based on the simulation and analysis with the ViP, the software optimization could improve system performance by more than 50%. However, in our case study, we found that the current ViP technique needs further improvements to become a true ESL design technique.","PeriodicalId":370841,"journal":{"name":"Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123202267","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Resource virtualization in real-time CORBA middleware","authors":"C. Gill","doi":"10.1145/1176254.1176299","DOIUrl":"https://doi.org/10.1145/1176254.1176299","url":null,"abstract":"Middleware for parallel and distributed systems is designed to virtualize computation and communication resources so that a more abstract and consistent view of those resources is presented to the applications that use them. Providing such a consistent virtualization in distributed real-time and embedded systems becomes increasingly challenging due to application constraints such as timeliness and resource constraints such as CPU speed, power, memory, and bandwidth limitations, which also must be considered. This paper describes several examples of real-time CORBA middleware and examines how different constraints impact the way in which resources are virtualized in each case. Particular attention is paid to which details are hidden from users of the middleware, which details are exposed in the middleware's programming model, and how the hidden and exposed details interact to shape middleware design and implementation choices.","PeriodicalId":370841,"journal":{"name":"Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131628773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Methodology for attack on a Java-based PDA","authors":"C. Gebotys, B. White","doi":"10.1145/1176254.1176279","DOIUrl":"https://doi.org/10.1145/1176254.1176279","url":null,"abstract":"Although mobile Java code is frequently executed on many wireless devices, the susceptibility to electromagnetic (EM) attacks is largely unknown. If analysis of EM waves emanating from the wireless device during a cryptographic computation does leak sufficient information, it may be possible for an attacker to reconstruct the secret key. Possession of the secret cryptographic key would render all future wireless communications insecure and cause further potential problems such as identity theft. Despite the complexities of a Java-based PDA device, this paper proposes and verifies a methodology which confirms EM attacks are possible. The proposed methodology involves pre-characterization of the PDA device through SEMA, thresholding, pattern recognition, and frequency-based DEMA. Results are repeatable over several different secret keys. Unlike previous research the new methodology does not require perfect alignment of EM frames and demonstrates robustness in the presence of a complex embedded system. This research is important for future wireless embedded systems which will increasingly demand higher levels of security.","PeriodicalId":370841,"journal":{"name":"Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06)","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127639673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Efficient computation of buffer capacities for multi-rate real-time systems with back-pressure","authors":"M. Wiggers, M. Bekooij, P. Jansen, G. Smit","doi":"10.1145/1176254.1176260","DOIUrl":"https://doi.org/10.1145/1176254.1176260","url":null,"abstract":"A key step in the design of multi-rate real-time systems is the determination of buffer capacities. In our multi-processor system, we apply back-pressure as caused by bounded buffers in order to control jitter. This requires the derivation of buffer capacities that both satisfy the temporal constraints as well as constraints on the buffer capacity. Existing exact solutions suffer from the computational complexity associated with the required conversion from a multi-rate dataflow graph to a single-rate dataflow graph. In this paper we present an algorithm, with linear computational complexity, that does not require this conversion and that determines close to minimal buffer capacities. The algorithm is applied to an MP3 play-back application that is mapped on our network based multi-processor system.","PeriodicalId":370841,"journal":{"name":"Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134175566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}