Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design最新文献_第2页

Session details: Performance, Power and Temperature Aspects in Deep Learning 会议细节:深度学习中的性能，功率和温度方面

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design Pub Date : 2022-10-30 DOI: 10.1145/3578471

Callie Hao, Jeff Zhang

引用次数: 0

Session details: Tutorial: TorchQuantum Case Study for Robust Quantum Circuits 教程:TorchQuantum鲁棒量子电路案例研究

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design Pub Date : 2022-10-30 DOI: 10.1145/3578472

Hanrui Wang

引用次数: 1

Session details: Physical Attacks and Countermeasures 会话详细信息:物理攻击和对策

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design Pub Date : 2022-10-30 DOI: 10.1145/3578447

Satwik Patnaik, Gang Qu

引用次数: 0

Session details: Advanced PIM and Biochip Technology and Stochastic Computing (Virtual) 会议详情:高级PIM和生物芯片技术及随机计算(虚拟)

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design Pub Date : 2022-10-30 DOI: 10.1145/3578464

Grace Li Zhang

引用次数: 0

Session details: Analog/Mixed-Signal Simulation, Layout, and Packaging (Virtual) 会议细节:模拟/混合信号仿真，布局和封装(虚拟)

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design Pub Date : 2022-10-30 DOI: 10.1145/3578463

Biying Xu, I. Yusim

引用次数: 0

Qilin

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design Pub Date : 2022-10-30 DOI: 10.1007/978-3-540-72816-0_17936

Edward Richter, Deming Chen

引用次数: 0

CoMUX

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design Pub Date : 2022-10-30 DOI: 10.1145/3508352.3549353

Siyuan Liang, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann, Tsung-Yi Ho

{"title":"CoMUX","authors":"Siyuan Liang, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann, Tsung-Yi Ho","doi":"10.1145/3508352.3549353","DOIUrl":"https://doi.org/10.1145/3508352.3549353","url":null,"abstract":"Flow-based microfluidic chips are one of the most promising plat-forms for biochemical experiments. Transportation channels and operation devices inside these chips are controlled by microvalves, which are driven by external pressure sources. As the complexity of experiments on these chips keeps increasing, control multiplexers (MUXes) become necessary for the actuation of the enormous number of valves. However, current binary-coding-based MUXes do not take full advantage of the coding capacity and suffer from the reliability problem caused by the high control channel density. In this work, we propose a novel MUX coding strategy, named Combinatorial Coding, along with an algorithm to synthesize combinatorial-coding-based MUXes (CoMUXes) of arbitrary sizes with the proven maximum coding capacity. Moreover, we develop a simplification method to reduce the number of valves and control channels in CoMUXes and thus improve their reliability. We compare CoMUX with the state-of-the-art MUXes under different control demands with up to 10 × 213 independent control channels. Experiments show that CoMUXes can reliably control more independent control channels with fewer resources. For example, when the number of the to-be-controlled control channels is up to 10 × 213, compared to a state-of-the-art MUX, the optimized CoMUX reduces the number of required flow channels by 44% and the number of valves by 90%.","PeriodicalId":367046,"journal":{"name":"Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124146091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Session details: Making Patterning Work (Virtual) 会议细节:制作图案工作(虚拟)

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design Pub Date : 2022-10-30 DOI: 10.1145/3578467

Yuzhe Ma

引用次数: 0

Observation Point Insertion Using Deep Learning 使用深度学习的观测点插入

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design Pub Date : 2022-10-30 DOI: 10.1145/3508352.3561122

Bonita Bhaskaran, Sanmitra Banerjee, Kaushik Narayanun, Shao-Chun Hung, Seyed Nima Mozaffari Mojaveri, Mengyun Liu, Gang Chen, Tung-Che Liang

{"title":"Observation Point Insertion Using Deep Learning","authors":"Bonita Bhaskaran, Sanmitra Banerjee, Kaushik Narayanun, Shao-Chun Hung, Seyed Nima Mozaffari Mojaveri, Mengyun Liu, Gang Chen, Tung-Che Liang","doi":"10.1145/3508352.3561122","DOIUrl":"https://doi.org/10.1145/3508352.3561122","url":null,"abstract":"Silent Data Corruption (SDC) is one of the critical problems in the field of testing, where errors or corruption do not manifest externally. As a result, there is increased focus on improving the outgoing quality of dies by striving for better correlation between structural and functional patterns to achieve a low DPPM. This is very important for NVIDIA's chips due to the various markets we target; for example, automotive and data center markets have stringent in-field testing requirements. One aspect of these efforts is to also target better testability while incurring lower test cost. Since structural testing is faster than functional tests, it is important to make these structural test patterns as effective as possible and free of test escapes. However, with the rising cell count in today's digital circuits, it is becoming increasingly difficult to sensitize faults and propagate the fault effects to scan-flops or primary outputs. Hence, methods to insert observation points to facilitate the detection of hard-to-detect (HtD) faults are being increasingly explored. In this work, we propose an Observation Point Insertion (OPI) scheme using deep learning with the motivation of achieving - 1) better quality test points than commercial EDA tools leading to a potential lower pattern count 2) faster turnaround time to generate the test points. In order to achieve better pattern compaction than commercial EDA tools, we employ Graph Convolutional Networks (GCNs) to learn the topology of logic circuits along with the features that influence its testability. The graph structures are subsequently used to train two GCN-type deep learning models - the first model predicts signal probabilities at different nets and the second model uses these signal probabilities along with other features to predict the reduction in test-pattern count when OPs are inserted at different locations in the design. The features we consider include structural features like gate type, gate logic, reconvergent-fanouts and testability features like SCOAP. Our simulation results indicate that the proposed machine learning models can predict the probabilistic testability metrics with reasonable accuracy and can identify observation points that reduce pattern count.","PeriodicalId":367046,"journal":{"name":"Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128483061","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Session details: Advanced VLSI Routing and Layout Learning 会议细节:高级VLSI路由和布局学习

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design Pub Date : 2022-10-30 DOI: 10.1145/3578446

Wing-Kai Chow, D. Chinnery

引用次数: 0