{"title":"Race-free scenarios of message sequence charts","authors":"Chien-An Chen, Sara Kalvala, J. Sinclair","doi":"10.1109/APSEC.2005.93","DOIUrl":"https://doi.org/10.1109/APSEC.2005.93","url":null,"abstract":"Message Sequence Charts (MSCs) are a graphical language for description of scenarios in terms of message exchanges between communicating components in a distributed environment. The language is popular in capturing system requirements in the design of reactive systems and communication protocols. In this paper, we review a design anomaly, called race conditions, in an MSC specification and present a few drawbacks with the current solution. We propose a new approach to correcting race conditions, and the limitation of this approach is also discussed.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131490355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A minimum proportional time redundancy based checkpoint selection strategy for dynamic verification of fixed-time constraints in grid workflow systems","authors":"Jinjun Chen, Yun Yang","doi":"10.1109/APSEC.2005.11","DOIUrl":"https://doi.org/10.1109/APSEC.2005.11","url":null,"abstract":"In grid workflow systems, existing typical checkpoint selection strategies, which are used to select checkpoints for verifying fixed-time constraints at run-time execution stage, are not effective and/or efficient for fixed-time constraint verification because they often ignore some necessary checkpoints and select some unnecessary checkpoints. To improve such status, in this paper, we develop a new checkpoint selection strategy. Specifically, we first address a new concept of minimum proportional time redundancy which can be used to tolerate certain time deviation incurred by abnormal grid workflow execution. Then, we discuss relationships between minimum proportional time redundancy and fixed-time constraint consistency. Based on the relationships, we present our new strategy. With the strategy, we can avoid the omission of necessary checkpoints and the selection of excess unnecessary checkpoints. Consequently, our strategy is more effective and efficient for fixed-time constraint verification than the existing typical strategies. The final evaluation further demonstrates this result.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"280 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115226895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On simulation of BPEL4WS/UML descriptions","authors":"S. Endo, T. Miyamoto, S. Kumagai, T. Fujii","doi":"10.1109/APSEC.2005.84","DOIUrl":"https://doi.org/10.1109/APSEC.2005.84","url":null,"abstract":"Increasing developments of systems using Web applications, SOA (service oriented architecture) based development becomes the focus of attention. However, in SOA based development, it is difficult to understand behaviors of system, which is integrated with many Web applications. Therefore, it is necessary to simulate the entire behavior in early stage. A formal semantics for UML activity diagrams has been proposed, where an activity diagram is mapped into a hypergraph called an activity hypergraph, and the semantics is defined on the hypergraphs. In this paper, we propose a mapping from BPEL4WS/UML descriptions into activity hypergraphs, and enhance the semantics to simulate entire systems.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"123 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115273157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An incremental analysis to workflow specifications","authors":"H. Hsu, Feng-Jian Wang, Da-Li Yang","doi":"10.1109/APSEC.2005.36","DOIUrl":"https://doi.org/10.1109/APSEC.2005.36","url":null,"abstract":"Workflow management technology helps modulizing and controlling complex business processes within an enterprise. Generally speaking, a workflow management system (WfMS) is composed of two primary components, a design environment and a run-time system. Structural, timing and resource verifications of a workflow specification are required to help assure the correctness of the specified system. In this paper, we address an incremental methodology to analyze resource consistency and timing constraints after each editing activity of a workflow specification and to provide proper feedbacks to designer or maintainer of the workflow specification.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126837053","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Towards aspect-oriented class diagrams","authors":"Gefei Zhang","doi":"10.1109/APSEC.2005.106","DOIUrl":"https://doi.org/10.1109/APSEC.2005.106","url":null,"abstract":"While aspect-oriented modeling has been recognized as a useful means of improving the modularity of software design, the de facto standard modeling language UML lacks first-class model elements representing aspects and does not provide genuine support for aspect-oriented modeling. We propose a simple extension of UML class diagrams which contains a very generic pointcut and advice language and facilitates to model with aspects. Using this approach, we achieve a better separation of concerns as well as more redundancy reduction in UML class diagrams and make them thus more readable and better maintainable.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127138390","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An approach for test suite selection to validate applications on deployment of COTS upgrades","authors":"A. Pasala, Animesh Bhowmick","doi":"10.1109/APSEC.2005.31","DOIUrl":"https://doi.org/10.1109/APSEC.2005.31","url":null,"abstract":"Typically, COTS undergo frequent upgrades. Organizations while deploying these upgrades ensure the correctness of existing systems by carrying out exhaustive regression tests. This process is typically costly and time-consuming. An efficient approach to regression testing would be to execute a subset of the system test suite that provides sufficient confidence in the system behavior. In that respect, we have developed a test framework that facilitates capturing and modeling of component interactions. These interactions are analyzed to select a subset of test cases to be executed during regression testing. The approach has been applied to a Web-based system and the results obtained are quite promising.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127250786","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Exception handling: an architecture model and utility support","authors":"Yu Chin Cheng, J. Jwo","doi":"10.1109/APSEC.2005.66","DOIUrl":"https://doi.org/10.1109/APSEC.2005.66","url":null,"abstract":"Exception handling design is an important but difficult subject in software development. In Java software development, the use of checked exceptions exacerbates the difficulty. In this paper, through the use of an architectural model, we show that an application can benefit from a separation of exceptions in terms of recoverability beyond distinguishing checked and unchecked exceptions. The architectural model helps evaluate and balance conflicting quality requirements such as modifiability, readability, and fault tolerance. Facilitated by object-oriented utility libraries, the architecture model guides the design from early stage of the development; an example is given to illustrate its use.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130392695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Analysis of the Suzuki-Kasami algorithm with the Maude model checker","authors":"K. Ogata, K. Futatsugi","doi":"10.1109/APSEC.2005.40","DOIUrl":"https://doi.org/10.1109/APSEC.2005.40","url":null,"abstract":"We report on a case study in which the Maude model checker has been used to analyze the Suzuki-Kasami distributed mutual exclusion algorithm with respect to the mutual exclusion property and the lockout freedom property. Maude is a specification and programming language/system based on membership equational logic and rewriting logic, equipped with model checking facilities. Maude allows users to use abstract data types, including inductively defined ones, in specifications to be model checked, which is one of the advantages of the Maude model checker. Hence, queues, which are used in the case study, do not have to be encoded in more basic data types. In the case study, the Maude model checker has found a counterexample that the algorithm is lockout free, which has led to one possible modification that makes the algorithm lockout free.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"141 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134142442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An integrated solution for testing and analyzing Java applications in an industrial setting","authors":"W. E. Wong, J. J. Li","doi":"10.1109/APSEC.2005.39","DOIUrl":"https://doi.org/10.1109/APSEC.2005.39","url":null,"abstract":"Testing a large-scale, real-life commercial software application is a very challenging task due to the constant changes in the software, the involvement of multiple programmers and testers, and a large amount of code. Integrating testing with development can help find program bugs at an earlier stage and hence reduce the overall cost. In this paper, we report our experience on how to apply eXVantage (a tool suite for code coverage testing, debugging, performance profiling, etc.) to a large, complex Java application at the implementation and unit testing phases in Avaya. Our results suggest that programmers and testers can benefit from using eXVantage to monitor the testing process, gain confidence on the quality of their software, detect bugs which are otherwise difficult to reveal, and identify performance bottlenecks in terms of which part of code is most frequently executed.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129485162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A qualitative method for measuring the structural complexity of software systems based on complex networks","authors":"Yutao Ma, K. He, Dehui Du","doi":"10.1109/APSEC.2005.14","DOIUrl":"https://doi.org/10.1109/APSEC.2005.14","url":null,"abstract":"How can we effectively measure the complexity of a modern complex software system has been a challenge for software engineers. Complex networks as a branch of complexity science are recently studied across many fields of science, and many large-scale software systems are proved to represent an important class of artificial complex networks. So, we introduce the relevant theories and methods of complex networks to analyze the topological/structural complexity of software systems, which is the key to measuring software complexity. Primarily, basic concepts, operational definitions, and measurement units of all parameters involved are presented respectively. Then, we propose a qualitative measure based on the structure entropy that measures the amount of uncertainty of the structural information, and on the linking weight that measures the influences of interactions or relationships between components of software systems on their overall topologies/structures. Eventually, some examples are used to demonstrate the feasibility and effectiveness of our method.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123225161","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}