{"title":"Proposal of a method to support testing for Java programs with UML","authors":"T. Katayama, Yusuke Yabuya","doi":"10.1109/APSEC.2005.91","DOIUrl":"https://doi.org/10.1109/APSEC.2005.91","url":null,"abstract":"There is an increasing need for effective testing of software for complex safety-critical applications. This paper proposes a supporting method of testing for Java programs by using Unified Modeling Language (UML) in order to improve the reliability of them. The correspondences of source codes in Java and elements of a class diagram, a sequence diagram, and a statechart diagram have been extracted. By using the extracted correspondences as test items in testing, it becomes possible to test effectively the specification of software, the structure of Java programs, the flows of processing of a system, and the flow of transition between states. Moreover, in order to confirm the validity of the proposed method, a prototype tool to support testing for Java programs is implemented. The inputs of this prototype are three diagrams, and the outputs are test items generated from the extracted correspondences. As an example, a source code of blackjack game in Java has been tested by using the test items outputted from the prototype. It has been possible to test 67.2% of the number of lines in the whole source code.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122771894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Sison, David Diaz, Eliska Lam, Dennis Navarro, Jessica Navarro
{"title":"Personal software process (PSP) assistant","authors":"R. Sison, David Diaz, Eliska Lam, Dennis Navarro, Jessica Navarro","doi":"10.1109/APSEC.2005.87","DOIUrl":"https://doi.org/10.1109/APSEC.2005.87","url":null,"abstract":"The personal software process (PSP) is a process and performance improvement method aimed at individual software engineers. The use of PSP has been shown to result in benefits such as improved estimation accuracy and reduced defect density of individuals. However, the experience of our institute and of several others is that recording various size and defect data can be onerous, which in, turn can lead to adoption and data quality problems. This paper describes a system that we have developed that performs automatic size and defect recording, aside from providing facilities for viewing and editing the usual PSP logs and reports. Moreover, the system automatically classifies and ranks defects, and then consolidates schedules and defect lists of individual developers into a schedule and defect library for the developers' team.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127131519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An incremental and practical approach to enable the component run-time evolution","authors":"Chang-ai Sun","doi":"10.1109/APSEC.2005.37","DOIUrl":"https://doi.org/10.1109/APSEC.2005.37","url":null,"abstract":"It is a desirable capability for some types of software-intensive systems to be able to modify components or architecture at the run-time. In this paper, we investigate how to enable the run-time modification of components in a system originally developed without catering for this feature at its design phase. In our proposed approach, components are incrementally and optionally wrapped with two categories of reflection interfaces, namely introspection (retrospection) interfaces that are designed to expose the component properties, while intercession (reconfiguration) interfaces that are designed to conduct run-time changes. We implement the incremental reflection interfaces as a library by leveraging the idea of poke technique that is widely used in many practical accessibility projects. A case study is used to demonstrate how our approach can enhance components with the reflection capacity on the basis of the legacy program code. Compared with existing techniques, our approach does not require systems re-developed from scratch in order to support the run-time modification of components.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129780671","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Aspect refinement and bounding quantification in incremental designs","authors":"S. Apel, Thomas Leich, G. Saake","doi":"10.1109/APSEC.2005.42","DOIUrl":"https://doi.org/10.1109/APSEC.2005.42","url":null,"abstract":"This article investigates aspects in the context of the incremental software development, i.e. software product lines. Specifically, we propose the integration of aspects into AHEAD, an architectural model for feature-based product line development. We introduce the notion of aspect refinement based on aspectual mixin layers, a novel technique for implementing features. Aspect refinement enables a programmer to evolve aspects over several product line development stages. This is novel since common AOP approaches do not have such an architectural model. We realize the idea of aspect refinement by introducing mixin-based inheritance to aspects. Furthermore, we propose bounding quantification that reduces the complexity and unpredictability of aspects in incremental software development. Our novel bounding mechanism exploits the natural order of the layered architecture introduced by the concept of aspect refinement. Aspect refinement and bounding quantification improve the incremental development of product lines using AOP techniques.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126274531","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A parametric model checking approach for real-time systems design","authors":"Chaiwat Sathawornwichit, T. Katayama","doi":"10.1109/APSEC.2005.12","DOIUrl":"https://doi.org/10.1109/APSEC.2005.12","url":null,"abstract":"Timing characteristic is a crucial point of concern in the design of real-time systems, because the systems are to operates under time-critical conditions. In this paper, we present a verification-driven approach for improving the correctness in the design of real-time systems. Our approach abstracts the details of timing information of the system by using time parameters. We propose parametric timed structure, an extension of timed transition systems, as a model for describing real-time systems. We define the parametric temporal logic PARCTL for specifying timing properties with time parameters. The model checking algorithms for parametric timed system are then proposed. The algorithms derive the necessary and sufficient condition over time parameters. We illustrate the application of our approach by deriving parameter conditions for a mutual exclusion protocol and show that the result of this approach can be used as guidelines for improving the timing correctness in the design of real-time systems.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126781306","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Microcomponent-based component controllers: a foundation for component aspects","authors":"V. Mencl, T. Bures","doi":"10.1109/APSEC.2005.78","DOIUrl":"https://doi.org/10.1109/APSEC.2005.78","url":null,"abstract":"In most component models, a software component consists of a functional part and a controller part. The controller part may be extensible; however, existing component models provide no means to capture the structure of the controller part, and therefore neither to specify the controller part extensions. In this paper, we introduce a minimalist component model to capture the structure of the controller part, coining the term microcomponent for the controller part elements. We further introduce the concept of a component aspect as a consistent set of controller part extensions. Within this framework, it is possible to seamlessly integrate controller part extensions, applying them to the components selected in the application's launch configuration. We have evaluated these concepts in a prototype implementation.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128845790","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A lightweight integration of theorem proving and model checking for system verification","authors":"W. Kong, Takahiro Seino, K. Futatsugi, K. Ogata","doi":"10.1109/APSEC.2005.9","DOIUrl":"https://doi.org/10.1109/APSEC.2005.9","url":null,"abstract":"Theorem proving and model checking are known as two formal verification techniques that have complementary features. In this paper, we describe a lightweight integration of the two techniques by a translation from theorem proving formalism to model checking formalism, and then treating model checking as part of the decision procedure. In the translation, system and property specifications defined for a theorem prover can be automatically translated to specifications feedable to a model checker after a simple data abstraction. The main aim of this integration is to provide the theorem prover with automatic counter-example generating capability, thus to be able to find \"bugs\" in the early stage of theorem proving and ease the hard-work of doing theorem proving. A case study is used to demonstrate how this translation works and what the verification flow is when using this integration to do system verification.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115023388","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Integrating an idea generation method into a goal-oriented analysis method for requirements elicitation","authors":"K. Oshiro, Kenji Watahiki, M. Saeki","doi":"10.1109/APSEC.2005.73","DOIUrl":"https://doi.org/10.1109/APSEC.2005.73","url":null,"abstract":"This paper proposes an extension of goal-oriented analysis method where an idea generation method is combined. Goal-oriented analysis methods are one of the promising approaches for requirements elicitation. However, they have two major shortcomings; 1) little support for goal elicitation and decomposition into sub-goals and 2) no explicit support for collaborative activities by stakeholders to elicit goals. In particular, stakeholders as the knowledge source play an important role on eliciting requirements of high quality and all of them should participate in requirements elicitation activities. In our technique, an idea generation method like Brainstorming is used to identify sub-goals. The team of stakeholders focuses on a goal and generates the ideas related to the goal. And then the team groups the generated ideas together into sub-goals. These steps are intertwined by an idea generation method and all of the stakeholders can participate in idea generation and grouping tasks.","PeriodicalId":359862,"journal":{"name":"12th Asia-Pacific Software Engineering Conference (APSEC'05)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115138883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}