The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory最新文献
{"title":"BITES - An Expert System For Integrated Circuit Board Inspection","authors":"C. Ntuen","doi":"10.1109/SSST.1992.712336","DOIUrl":"https://doi.org/10.1109/SSST.1992.712336","url":null,"abstract":"This paper describes an expert system known as BITES (an acronym for integrated Board Inspection and Training Expert System). BITES is designed for two purposes: 1) automation of inspection process performed by knowledgeable inspectors or quality control technicians; and 2) for use as a training tool for new inspectors.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130703600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Canonical Perspective Image (CPI) Algorithm","authors":"N. Malladi, P. Chirala, S. M. Philipose","doi":"10.1109/SSST.1992.712338","DOIUrl":"https://doi.org/10.1109/SSST.1992.712338","url":null,"abstract":"A Canonical Perspective Image (CPI) Algorithm has been developed to obtain iteratively, a unique silhouette of an object corresponding to a given resting flat or face. The geometric properties of this unique silhouette can be used to determine the position and orientation of the object resting on a flat surface.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134059938","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Finite Dimensional Robust Controller Designsvia the Gap Metric","authors":"Su Zhu","doi":"10.1109/SSST.1992.712324","DOIUrl":"https://doi.org/10.1109/SSST.1992.712324","url":null,"abstract":"There are two schemes provided via the gap metric for designing finite dimensional robust controllers for distributed parameter LTI systems. The finite dimensional controllers designed according to these two schemes are guaranteed to stabilize the distributed parameter LTI systems and their neighborhoods, and the real closed-loop responses can be estimated via the designed ones. Several related problems are also addressed such as the continuity of the largest robust stability radius, the finite dimensional approximations in the gap metric, and the relationship between the largest robust stability radius of a system and that of its optimally robust controllers.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130249484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"TMS320C40 Processor in a BDFA Multiprocessor System","authors":"K. Ellis","doi":"10.1109/SSST.1992.712270","DOIUrl":"https://doi.org/10.1109/SSST.1992.712270","url":null,"abstract":"A special-purpose processor can he used as a node processor in a processor array for a BDFA multiprocessor system designed to achieve real-time digital signal processing for a specific application. In this paper, I discuss the use of the Texas Instrument TMS320C40 processor as a node processor. My goal is to obtain a system design which can accommodate up to 1000 processors. The design criteria is linear speed-up as additional processors are added until real-time processing is reached for a particular application.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116491920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Quest for Minimum Number of Simultaneous Rectangle Diagrams","authors":"M. Erdey","doi":"10.1109/SSST.1992.712356","DOIUrl":"https://doi.org/10.1109/SSST.1992.712356","url":null,"abstract":"On the rectangle diagram of an RLC network all of the circuit elements are represented with rectangles having a width equal to the instantaneous current through the element and a height equal to the instantaneous voltage across it, thus the area of each rectangle is equal to the power supplied or absorbed by the element. In these diagrams the power rectangles of the sources are contiguously filled out by the rectangles of the sinks. These type of diagram will be used in our analysis.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114578256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The Upper Bounds for Delay and Cell Loss Probability of ATM Traffic in a Finite Capacity Polling System","authors":"A. Nilsson, Y. F. Jou, Fuyung Lai","doi":"10.1109/SSST.1992.712328","DOIUrl":"https://doi.org/10.1109/SSST.1992.712328","url":null,"abstract":"This paper focuses on the upper bounds for both the mean delay and the probability of cell loss that bursty arrivals incur in a finite capacity multiqueue system with nonexhaustive cyclic service. We compute the upper bounds for this system by considering a cell multiplexer with the same arrival processes and equal queue capacity. Under the ATM environment, the mean delay obtained from this multiplexer cannot only serve as an upper bound but also render a fairly accurate estimation for the mean delay of the polling system. For the cell loss probability, we consider a multiple urn model with uniform occupancy distribution which will guarantee the upper bound. A heuristic method is proposed to give better estimates for cases which have medium to high cell loss rate.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128542783","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A New Model for Predicting the MRTD Curve for Thermal Imagers","authors":"A. R. Ugarte, R. Pieper","doi":"10.1109/SSST.1992.712268","DOIUrl":"https://doi.org/10.1109/SSST.1992.712268","url":null,"abstract":"We present a new model for predicting the minimum resolvable temperature difference (MRTD) curve of thermal imaging systems (TIS). The analysis for the new model concentrates on contrast reduction due to spatial frequency limiting factors of subsystem components. Curves have been generated for this model for a system with typical component values. These results are compared with curves generated from the commonly accepted Ratches-Lawson (R-L) model. This proposed model leads to a simpler development for an MRTD predictor and appears to provide a more reliable tool for forecasting the performance of a TIS.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"880 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133278152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Preliminary Characterization of an Infra-Red Multi-Position Sensor System","authors":"D. Allwine, R. D. Irwin","doi":"10.1109/SSST.1992.712316","DOIUrl":"https://doi.org/10.1109/SSST.1992.712316","url":null,"abstract":"A process for preliminary characterization of an infrared multi-position sensor system is discussed. A partial map of the detection surface has been made in order to facilitate examination of other properties of the sensor. Noise and temperature characteristics are investigated and geometric arguments are made that support data obtained from the position calibration tests.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133799050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On the Structural Requirements of Mutlilayer Perceptronsin Binary Field","authors":"Sungkwon Park, A. Marston, Jung H. Kim","doi":"10.1109/SSST.1992.712262","DOIUrl":"https://doi.org/10.1109/SSST.1992.712262","url":null,"abstract":"This paper introduces several multilayer perceptron (MLP) existence theorems and discuses required numbers of neurons and hidden layers of MLP's for binary functions. Due to the convenience of analysis and its inherent classification ability, only MLP's with neurons using hardlimiter activation junctions are studied. Three different methods of deploying hyperplanes are discussed in this paper. Among them, the first two methods require only a single hidden layer to separate a given pattern. The last one requires two hidden layers. For a Boolean function, it is shown that the number of neurons in the hidden layer should be identical to the number of hyperplanes required to separate if one of the two methods is used. Similarly, the requirements for multiple output cases are discussed.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123837870","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Automated Power System Planning","authors":"G. Lebby","doi":"10.1109/SSST.1992.712312","DOIUrl":"https://doi.org/10.1109/SSST.1992.712312","url":null,"abstract":"As electric utilities grow in size and complexity, planning for future expansion and system security has become increasingly complicated. The cost of making corrective changes in the power system has made it necessary for utilities to consider long-range design options and to perform detailed computer studies when considering network modifications (especially when the modifications will have a large impact upon system performance and overall operation.) To assist engineers in system planning, an Automated Power System Planning (ASP) tool that uses machine intelligence concepts is presented. In response to system planning scenarios imposed by a system planner, the ASP will propose corrective planning options, based upon expert knowledge in the power system planning field, known physical constraints, and historical system information.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124741376","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}