{"title":"An ultra high performance scalable DSP family for multimedia","authors":"E. Machnicki","doi":"10.1109/HOTCHIPS.2005.7476589","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476589","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation. The author reports the following for this product: Multicore Architecture for Media Processing (16 DSP cores optimized for video/media: SIMD, SAD, PIMAC with up to 89.6 GMACs (8x8); State-of-the-Art Development Tools (Graphical multiprocessor debugger/profiler and Multiprocessor dynamic scheduling and run time analysis); and overall High Performance (1 H.264 D1, or 16 MPEG4 CIF channels, encode With resources to spare for audio, intelligent video, I/O, etc. making this a true single-chip solution).","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122554344","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The design and implementation of the TRIPS prototype chip","authors":"Robert G. McDonald, D. Burger, S. Keckler","doi":"10.1109/HOTCHIPS.2005.7476592","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476592","url":null,"abstract":"This article consists of a collection of slides from the authors' conference presentation. They conclude that: distributed microarchitecture acknowledges and tolerates wire delay and scalable protocols tailored for distributed components. Tiled microarchitecture simplifies scalability and improves design productivity. The next step for instruction-level parallelism is EDGE ISA enables increased ILP while also exploiting coarser types of parallelism.","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116759646","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Scott Clark, Kent Haselhorst, K. Imming, John D. Irish, D. Krolak, Tolga Ozguner
{"title":"Cell broadband engine interconnect and memory interface","authors":"Scott Clark, Kent Haselhorst, K. Imming, John D. Irish, D. Krolak, Tolga Ozguner","doi":"10.1109/HOTCHIPS.2005.7476577","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476577","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115778357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ryuji Sakai, S. Maeda, Christopher Crookes, M. Shimbayashi, K. Yano, Tadashi Nakatani, H. Yano, S. Asano, Masaya Kato, H. Nozue, Tatsunori Kanai, T. Shimada, Koichi Awazu
{"title":"Programming and performance evaluation of the cell processor","authors":"Ryuji Sakai, S. Maeda, Christopher Crookes, M. Shimbayashi, K. Yano, Tadashi Nakatani, H. Yano, S. Asano, Masaya Kato, H. Nozue, Tatsunori Kanai, T. Shimada, Koichi Awazu","doi":"10.1109/HOTCHIPS.2005.7476579","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476579","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134269449","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Telairity-1: A real time H.264 high definition video architecture","authors":"Richard Dickson","doi":"10.1109/HOTCHIPS.2005.7476586","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476586","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"160 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114820262","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High-performance processing with 90-nm FPGAs","authors":"K. Vissers, E. Goetting, P. Alfke","doi":"10.1109/HOTCHIPS.2005.7476600","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476600","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129118966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Barcelona: A fibre channel Switch SoC for enterprise SANs","authors":"Nital Patwa","doi":"10.1109/HOTCHIPS.2005.7476582","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476582","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126867771","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Debendra Das Sharma, A. Gupta, Gordon Kurpanek, Dean Mulla, Bob Pflederer, Ram Rajamani
{"title":"TwinCastle: A multi-processor north bridge server chipset","authors":"Debendra Das Sharma, A. Gupta, Gordon Kurpanek, Dean Mulla, Bob Pflederer, Ram Rajamani","doi":"10.1109/HOTCHIPS.2005.7476603","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476603","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115518227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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