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2005 IEEE Hot Chips XVII Symposium (HCS)最新文献

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Power-aware microarchitectures: Design, modeling and metrics 功耗感知微架构:设计、建模和度量
2005 IEEE Hot Chips XVII Symposium (HCS) Pub Date : 2005-08-01 DOI: 10.1109/HOTCHIPS.2005.7476570
P. Bose
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引用次数: 2
High-performance pattern-matching engine for intrusion detection: A new approach for fast programmable accelerators 用于入侵检测的高性能模式匹配引擎:一种快速可编程加速器的新方法
2005 IEEE Hot Chips XVII Symposium (HCS) Pub Date : 2005-08-01 DOI: 10.1109/HOTCHIPS.2005.7476583
J. van Lunteren, T. Engbersen
{"title":"High-performance pattern-matching engine for intrusion detection: A new approach for fast programmable accelerators","authors":"J. van Lunteren, T. Engbersen","doi":"10.1109/HOTCHIPS.2005.7476583","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476583","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132117310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Next-generation audio engine 下一代音频引擎
2005 IEEE Hot Chips XVII Symposium (HCS) Pub Date : 2005-08-01 DOI: 10.1109/HOTCHIPS.2005.7476587
R. Kennedy, D. Petkov
{"title":"Next-generation audio engine","authors":"R. Kennedy, D. Petkov","doi":"10.1109/HOTCHIPS.2005.7476587","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476587","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation. The authors report: Realistic configurations approaching 300 MHz, below 100k gates, below 1.5mW for MP3 decode; Excellent performance on broad set of audio applications, including future codecs; Rich audio instruction set with complete, extension-aware software tools support; Processor remains configurable to take on additional tasks; and Power, performance, and broad codec support that make HiFi2 appropriate for a wide range of consumer and automotive products.","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133588773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low-power, networked MIMD processor for particle physics 用于粒子物理的低功耗网络化 MIMD 处理器
2005 IEEE Hot Chips XVII Symposium (HCS) Pub Date : 2005-08-01 DOI: 10.1109/HOTCHIPS.2005.7476591
V. Lindenstruth
{"title":"Low-power, networked MIMD processor for particle physics","authors":"V. Lindenstruth","doi":"10.1109/HOTCHIPS.2005.7476591","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476591","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation. The following slides give a brief overview of the scientific environment of the application for the MIMD Processor. One goal of the experiments under construction is the generation of a quark/gluon plasma, which can only be created by colliding nuclei at very high kinetic energies. The slides show a schematic overview of an appropriate experiment, capable of detecting the reaction products of such collisions. The photos show the experiment at its current state. It is scheduled to take first experimental data in Q2 2007.","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127864154","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Multiple cores, multiple pipes, multiple threads - do we have more parallelism than we can handle? 多核、多管道、多线程——我们的并行度是否超出了我们的处理能力?
2005 IEEE Hot Chips XVII Symposium (HCS) Pub Date : 2005-08-01 DOI: 10.1109/HOTCHIPS.2005.7476598
D. Kirk
{"title":"Multiple cores, multiple pipes, multiple threads - do we have more parallelism than we can handle?","authors":"D. Kirk","doi":"10.1109/HOTCHIPS.2005.7476598","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476598","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123039416","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Super companion chip with audio visual interface for cell processor 超级伴侣芯片与音频可视接口的细胞处理器
2005 IEEE Hot Chips XVII Symposium (HCS) Pub Date : 2005-08-01 DOI: 10.1109/HOTCHIPS.2005.7476578
Takayuki Mihara, H. Muroga, H. Doi, Tadashi Yabuta, Y. Iwagami, K. Ishii, Naohiko Okamoto, Kazuki Iwata, Y. Aoyama, Takeshi Takamiya, N. Sugawa
{"title":"Super companion chip with audio visual interface for cell processor","authors":"Takayuki Mihara, H. Muroga, H. Doi, Tadashi Yabuta, Y. Iwagami, K. Ishii, Naohiko Okamoto, Kazuki Iwata, Y. Aoyama, Takeshi Takamiya, N. Sugawa","doi":"10.1109/HOTCHIPS.2005.7476578","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476578","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115020050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
DAPDNA-2 a dynamically reconfigurable processor with 376 32-bit processing elements DAPDNA-2是一个具有376个32位处理元素的动态可重构处理器
2005 IEEE Hot Chips XVII Symposium (HCS) Pub Date : 2005-08-01 DOI: 10.1109/HOTCHIPS.2005.7476596
Tomoyoshi Sato
{"title":"DAPDNA-2 a dynamically reconfigurable processor with 376 32-bit processing elements","authors":"Tomoyoshi Sato","doi":"10.1109/HOTCHIPS.2005.7476596","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476596","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"333 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122876738","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Intel 8×× seriies and paxville xeon-MP microprocessors 英特尔8××系列和paxville xeon-MP微处理器
2005 IEEE Hot Chips XVII Symposium (HCS) Pub Date : 2005-08-01 DOI: 10.1109/HOTCHIPS.2005.7476602
Jonatthan Dougllas
{"title":"Intel 8×× seriies and paxville xeon-MP microprocessors","authors":"Jonatthan Dougllas","doi":"10.1109/HOTCHIPS.2005.7476602","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476602","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"128 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123251735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
The nios II family of configurable soft-core processors nios II系列可配置软核处理器
2005 IEEE Hot Chips XVII Symposium (HCS) Pub Date : 2005-08-01 DOI: 10.1109/HOTCHIPS.2005.7476599
J. Ball
{"title":"The nios II family of configurable soft-core processors","authors":"J. Ball","doi":"10.1109/HOTCHIPS.2005.7476599","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476599","url":null,"abstract":"","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121482041","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
High speed low cost nexperia PNX1700 super-pipelined media-processor 高速低成本的nexperia PNX1700超流水线媒体处理器
2005 IEEE Hot Chips XVII Symposium (HCS) Pub Date : 2005-08-01 DOI: 10.1109/HOTCHIPS.2005.7476588
Luis Lucas
{"title":"High speed low cost nexperia PNX1700 super-pipelined media-processor","authors":"Luis Lucas","doi":"10.1109/HOTCHIPS.2005.7476588","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2005.7476588","url":null,"abstract":"Presents a collection of slides covering the following topics: data cache; hardware prefetching; allocate-on-write cache miss policy; bandwidth availability sharing; system on chip; low cost; and low power.","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123949064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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