2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools最新文献_第6页

System Level Hardening by Computing with Matrices 用矩阵计算系统级加固

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Pub Date : 2010-09-01 DOI: 10.1109/DSD.2010.8

R. Ferreira, Álvaro Freitas Moreira, L. Carro

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引用次数: 3

Dynamic Control Flow Checking Technique for Reliable Microprocessors 可靠微处理器的动态控制流检测技术

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Pub Date : 2010-09-01 DOI: 10.1109/DSD.2010.81

M. Sugihara

引用次数: 1

Computation Reduction Techniques for Vector Median Filtering and their Hardware Implementation 向量中值滤波的计算缩减技术及其硬件实现

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Pub Date : 2010-09-01 DOI: 10.1109/DSD.2010.102

Ozgur Tasdizen, Ilker Hamzaoglu

引用次数: 6

Software Programmable Data Allocation in Multi-bank Memory of SIMD Processors SIMD处理器多组存储器中的软件可编程数据分配

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Pub Date : 2010-09-01 DOI: 10.1109/DSD.2010.26

Jian Wang, Joar Sohl, Olof Kraigher, Dake Liu

{"title":"Software Programmable Data Allocation in Multi-bank Memory of SIMD Processors","authors":"Jian Wang, Joar Sohl, Olof Kraigher, Dake Liu","doi":"10.1109/DSD.2010.26","DOIUrl":"https://doi.org/10.1109/DSD.2010.26","url":null,"abstract":"The host-SIMD style heterogeneous multi-processor architecture offers high computing performance and user friendly programmability. It explores both task level parallelism and data level parallelism by the on-chip multiple SIMD coprocessors. For embedded DSP applications with predictable computing feature, this architecture can be further optimized for performance, implementation cost and power consumption. The optimization could be done by improving the SIMD processing efficiency and reducing redundant memory accesses and data shuffle operations. This paper introduces one effective approach by designing a software programmable multi-bank memory system for SIMD processors. Both the hardware architecture and software programming model are described in this paper, with an implementation example of the BLAS syrk routine. The proposed memory system offers high SIMD data access flexibility by using lookup table based address generators, and applying data permutations on both DMA controller interface and SIMD data access. The evaluation results show that the SIMD processor with this memory system can achieve high execution efficiency, with only 10% to 30% overhead. The proposed memory system also saves the implementation cost on SIMD local registers, in our system, each SIMD core has only 8 128-bit vector registers.","PeriodicalId":356885,"journal":{"name":"2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128788854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Customizable Composition and Parameterization of Hardware Design Transformations 硬件设计转换的可定制组合和参数化

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Pub Date : 2010-09-01 DOI: 10.1109/DSD.2010.78

T. Todman, Qiang Liu, W. Luk, G. Constantinides

{"title":"Customizable Composition and Parameterization of Hardware Design Transformations","authors":"T. Todman, Qiang Liu, W. Luk, G. Constantinides","doi":"10.1109/DSD.2010.78","DOIUrl":"https://doi.org/10.1109/DSD.2010.78","url":null,"abstract":"A promising approach to high-level design is to start initially with an obvious but possibly inefficient design, and apply multiple transformations to meet design goals. Many hardware compilation tools support a fixed recipe of applying design transformations, but designers have few options to adapt the recipe without re-writing the tools themselves. In addition, complex transformations based on linear programming and geometric programming are often not included. This paper proposes anew approach that enables designers to customize the composition and parameterization of different types of design transformations in a unified framework, using a high-level language to control a transformation engine to automate the application of design transformations. Our approach is implemented by a tool based on the Python language and the ROSE compiler framework, which supports both syntax-directed transformations such as loop coalescing, and goal-directed transformations such as geometric programming. We illustrate how customizing the composition and parameterization of design transformations can lead to designs with different trade-offs in performance, resource usage, and energy efficiency. We evaluate our approach on benchmarks including matrix multiplication, Monte Carlo simulation of Asian options, edge detection, FIR filtering, and motion estimation.","PeriodicalId":356885,"journal":{"name":"2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124627724","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

On CMOS Memory Design in Low Supply Voltage for Integrated Biosensor Applications 集成生物传感器低电压CMOS存储器设计研究

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Pub Date : 2010-09-01 DOI: 10.1109/DSD.2010.113

Allen Chen, Ryan Hoppal, Tom Chen

引用次数: 0

Architecture-Level Design Space Exploration of Super Scalar Microarchitecture for Network Applications 面向网络应用的超标量微体系结构的体系结构级设计空间探索

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Pub Date : 2010-09-01 DOI: 10.1109/DSD.2010.94

M. Salehi, H. Dorosti, S. M. Fakhraie

引用次数: 2

Static Average Case Power Estimation Technique for Block Ciphers 分组密码的静态平均功率估计技术

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Pub Date : 2010-09-01 DOI: 10.1109/DSD.2010.105

Tingcong Ye, D. Vasudevan, Jiaoyan Chen, E. Popovici, M. Schellekens

引用次数: 4

NoC Switch with Credit Based Guaranteed Service Support Qualified for GALS Systems 具有基于信用的保证服务支持的NoC交换机，适用于GALS系统

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Pub Date : 2010-09-01 DOI: 10.1109/DSD.2010.30

T. Kranich, Mladen Berekovic

引用次数: 14

Real-Time Testing of True Random Number Generators Through Dynamic Reconfiguration 动态重构真随机数生成器的实时测试

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Pub Date : 2010-09-01 DOI: 10.1109/DSD.2010.56

Dan Hotoleanu, O. Creţ, A. Suciu, Tamas Györfi, L. Văcariu

引用次数: 17