2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)最新文献

{"title":"An Advanced Cold Plate Liquid Cooling Rack Design for Hyperscale Data Center","authors":"Yuehlin Tsai, Guilin Wang, Yuehong Jin, Sheng Li, Wenyi Fang, Guofeng Chen, Peng Cao, Jun Zhang, Yuehong Fan, Yuyang Xia, Wenbin Tian, Hang Cheng, Xingping Ruan, Hongxing Zhou, N. Ahuja, Qing Qiao, Mohan J. Kumar","doi":"10.1109/iTherm54085.2022.9899555","DOIUrl":"https://doi.org/10.1109/iTherm54085.2022.9899555","url":null,"abstract":"As the emerging business models and advanced customer experience is driving an explosion of data at the era of 5G, data center has been evolving with increasingly powerful AI (Artificial Intelligence) computing capability for enhancing CSP (Cloud Service Provider) cloud service by data analytics in data centric world. High-performance computing, storage and networking are essential to achieve this. Meanwhile, energy efficiency, which is measured by PUE, is the mandatory design target for modern data center. The cold plate liquid cooling solution is one of crucial technologies to continual address the demand of higher performance computing at lower PUE. This paper introduces an advanced cold plate liquid cooling rack architecture for JD.COM data center as well as the key learnings from JD.com engineering practice and validation data, including system level liquid cooling design related ingredients’ design and selection, such as CPU cold plates, memory cold plates, leakage detection, and quick disconnects, etc. Moreover, JD.COM’s novel methodology for optimized CPU cold plate design as well as the implementation of whole-loop leakage detection in a JD.COM datacenter are also introduced.","PeriodicalId":351706,"journal":{"name":"2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115276758","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Drop Shock Performance of SAC-Bi Compared to SnPb","authors":"P. Vyas, M. Belhadi, Xin Wei, Ehab Hamasha, Abdallah Alakayleh, Arvind Srinivasan, Raj Kiran Akula, S. Hamasha, J. Suhling, P. Lall","doi":"10.1109/iTherm54085.2022.9899679","DOIUrl":"https://doi.org/10.1109/iTherm54085.2022.9899679","url":null,"abstract":"Lead free soldering has become mainstream since the Restriction of Hazardous Substances (RoHS) Directive. Solders have come a long way from the traditional SnPb (Tin-Lead) to lead-free alloys doped with elements such as Bismuth (Bi), Antimony (Sb), Nickel (Ni), etc. Following the transition from ductile lead-based alloys to strong but brittle lead-free solder alloys, the board-level drop test has become a vital reliability evaluation criterion for electronic packages. In this paper, a drop shock reliability comparison was made between SAC305, SAC-Bi, and SnPb. The tested component was a 0.8mm pitch, 15mm body CABGA208. The test vehicle has an Organic Surface Protection (OSP) surface finish and a matching solder sphere with paste alloys. Ten test boards were subjected to drop test, with a peak acceleration of 1500G and 0.5ms pulse duration per JEDEC drop test condition B. After the drop test, a Weibull analysis was performed to study the drop shock reliability for each alloy. Microstructure analysis was also performed to determine the failure mode and the failure location on the board. It was observed that SAC-3.3Bi has the highest drop shock reliability among all the alloys, followed by SAC305, while Sn63Pb37 had the lowest drop shock reliability.","PeriodicalId":351706,"journal":{"name":"2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)","volume":"33 7-8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123345756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Qualification of the Samtec SEAM and SEAF connectors for use as a printed circuit board assembly (PCBA) stacking connector in space applications","authors":"Neil Dalal, Nabid Farvez, Kyle Anderson, Allison M. Orr, S. Ling, R. Hacala","doi":"10.1109/iTherm54085.2022.9899599","DOIUrl":"https://doi.org/10.1109/iTherm54085.2022.9899599","url":null,"abstract":"The Johns Hopkins University Applied Physics Laboratory’s (JHU/APL) modular electronics design on past space missions leverages the through-hole IEH Hypertronics stacking connector. To meet the needs of the upcoming Dragonfly mission to Titan, APL searched for a higher density option because a major limiting factor will be printed circuit board assembly (PCBA) space. The Samtec SEAM and SEAF connectors were identified as the best candidate to flow through a full space environmental test qualification. The connector needed to stack PCBAs together, have 200+ input/output (I/O), survive vibration, shock, and thermal environments, be low outgassing, and accomplish greater than 200 MHz signal integrity. The SEAM and SEAF connector pair were also attractive because of their surface mount instead of through-hole board attachment as well as small pitch (0.050’’). Although the SEAM and SEAF connectors do not fall under the worrisome ‘tuning fork’ category, they do not have a multi-point contact required by EEE-INST-02 so a qualification test was the only way to prove reliability of the connectors for space application.The completed test units undergoing environmental testing consisted of two 5-\"slice\" test \"boxes\", one for 240-pin connectors and one for 400-pin connectors. Each slice consisted of SEAM and/or SEAF connectors assembled to a 6.5’’ x 3.7’’ x 0.093’’ printed circuit board (PCB) and mounted into an aluminum frame with a stiffener surrounding the connector to minimize dynamic displacement due to vibration. Additional solder was deposited on the board during the assembly process via stencil as well as jet printing before the connector was hand placed onto the PCBA. Both methods to complement the solder charged connector leads were successful in securely attaching the connectors to the board without shorts or opens as confirmed by X-ray and CT scanning. Each test box contained four SEAM and four SEAF connectors as each end slice only contained one connector to have a closed-loop daisy chain that could be monitored for four-wire resistance to assess continuity and intermittence. The 5-slice boxes were assembled by mating each slice to its adjacent neighbor one at a time followed by the inclusion of end covers and threaded rods.The qualification test followed APL’s test-as-you-fly principle. Prior to box assembly, a 20-cycle mate and demate test was performed on each connector interface between slices to confirm the integrity of each lead’s gold plating. Random vibration to protoflight GEVS 14.1 gRMS and shock testing to 2828 g’s were conducted in all three axes with intermittence monitoring to 50 nanosecond resolution. Subsequently, 400-plus cycles of in-air thermal cycling from -40 to +125 °C was completed to bound the harshest conceivable thermal cycling mission at APL. Every step of the test plan, a four-wire resistance measurement was taken to confirm the daisy chain connection and consequently that the stacking connectors were functioning as i","PeriodicalId":351706,"journal":{"name":"2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)","volume":"2 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128782410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Experimental Characterization of a Compact Thermosyphon Cooling System Operating with R1234ze(E) and R1233zd(E) Low-GWP Refrigerants","authors":"R. L. Amalfi, Cong H. Hoang, R. Enright, John Kim, Filippo Cataldo, J. Marcinichen, J. R. Thome","doi":"10.1109/iTherm54085.2022.9899592","DOIUrl":"https://doi.org/10.1109/iTherm54085.2022.9899592","url":null,"abstract":"The proposed work is built upon the research findings published at ITHERM 2020 and 2021 in which a novel thermal management solution has been introduced for next generation computing and telecom hardware platforms. The increasing demand towards achieving greater functionality and massive device connectivity is calling for new hardware and server architectures, including new materials and packaging techniques, which will require more efficient thermal management solutions to realize economic scaling compared to existing air-based, liquid cold plate and immersion cooling systems. The envisioned compact thermosyphon-based cooling system that passively dissipate the heat generated by the hardware components (e.g. central processing units, memory units, accelerators, etc.) via latent heat operates with numerous server-level, and has the flexibility to be interfaced with new or existing cooling infrastructures for broad market adoption. The present study mainly focuses on the thermal performance characterization of a compact thermosyphon cooling system, introduced in previous ITHERM publications, where the existing database has been expanded with new operating conditions, using R1234ze(E) and R1233zd(E) as the low-GWP working fluids. Experiments have been carried out in steady-state mode, analyzing the effect of base heat flux, filling ratio, secondary side water mass flow rate and inlet temperature on the system performance. Dedicated experiments with contact pressure variations have also been performed to characterize the contribution of thermal interface material on the total thermal resistance of the cooling system. Our results demonstrate that better thermal performance can be achieved using R1234ze(E) in place of R1233zd(E) with a reduction up to 40% in total thermal resistance, however the improvement in cooling capability needs to be accommodated by higher operating pressures.","PeriodicalId":351706,"journal":{"name":"2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128827707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Transient study of phase change material based hybrid heat sink for electronics cooling application","authors":"Priya I. Borkar, V. S. Duryodhan","doi":"10.1109/iTherm54085.2022.9899523","DOIUrl":"https://doi.org/10.1109/iTherm54085.2022.9899523","url":null,"abstract":"This work proposes a hybrid heat sink in which primary cooling is achieved by PCM (Phase change material), whereas the second one is based on liquid channels. The purpose of the liquid channel is to extract the heat from PCM in order to re-solidify it intermittently as per the requirement. A three-dimensional plate-fin heat sink [20 mm (L) x 3 mm (W) x 10 mm (H)] with inter-fin spacing filled with PCM and a channel embedded inside the tip of the fin is employed in this study. Three-dimensional transient numerical simulations are performed to identify the optimum operating condition governed by energy consumption and the liquid fraction of PCM. Simulations are performed at different heat flux (5 - 15 W/cm2), and inlet velocity (0.5 – 1.5 m/s). Parameters such as PCM-heat source interface temperature, the liquid fraction of PCM, pressure drop are recorded for each case. It is observed that the time taken to reach critical operating temperature varies inversely with heat flux. The cooling rate is a direct function of inlet velocity; however, temperature decreases exponentially, especially at higher heat flux. The importance of fast recharging/re-solidification of PCM at a low energy consumption cost is envisioned. For the heat sink configuration studied here, an optimum heat flux of 10 W/cm2 is identified at which a substantial reduction in liquid fraction can be achieved in a short duration of time at inlet velocity ≥ 1 m/s. More emphasis is given to energy consumption rather than flow time used in secondary cooling. A lower liquid fraction at the end of secondary cooling (i.e., partial melting of PCM) ensures the safe operating condition for electronic devices even in the presence of the impulse of heat generation. The findings presented in this work is useful to design PCM based hybrid heat sink for electronics cooling.","PeriodicalId":351706,"journal":{"name":"2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129062313","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Study of the Impact of the Airflow and Filling Ratio on the Thermal Performances of a Two-Phase Immersion Cooling Prototype","authors":"Omidreza Ghaffari, C. A. Sayed, M. Vincent, Francis Grenier, Simon Jasmin, L. Fréchette, J. Sylvestre","doi":"10.1109/iTherm54085.2022.9899558","DOIUrl":"https://doi.org/10.1109/iTherm54085.2022.9899558","url":null,"abstract":"Evacuating high heat fluxes for new generation microprocessors is a challenge in electronics cooling applications. We conducted a thermal performance study on a novel two-phase thermosyphon prototype to cool high-power microprocessors in a 4U form factor. The prototype was mounted on a heater assembly for the thermal performance tests. A heat spreader was attached on top of the square 2.54 cm by 2.54 cm heater, with the top side of the heat spreader being enhanced with a 500 micron thick multi-scale electroplated porous copper coating. The localized boiling and condensation occurred inside the prototype, using the Novec™ 7000 liquid from the 3M Corporation. The prototype was air-cooled (using a single fan), and different air flows were tested, from 102 m3/h to 237 m3/h. The effect of the filling ratio was studied between 9% and 70%. At a filling ratio of 9 % and an airflow of 237 m3/h, the maximum power achieved was (525 ± 7) W (a heat flux of 81± 1.2 W/cm2), the heater wall temperature was 75°C, and no dry out was observed. At an airflow of 102 m3/h at the same power level, the heater wall temperature was less than 83°C, so the prototype could be used even with low airflow rates if the fan power consumption needs to be reduced in specific electronics cooling applications. The total thermal resistance included the contributions of the heater body, its thermal interface material layer, the evaporator (boilerplate with porous coating), the condenser, and the air-cooled heat exchanger. At the highest tested airflow rate, the minimum achieved heater to ambient air thermal resistance was (0.096 ± 0.0018)°C/W for a filling ratio of 9%. The dominant thermal resistance was from the heater to the liquid, representing between 50% and 70 % of the total resistance in all the tested scenarios at different filling ratios.","PeriodicalId":351706,"journal":{"name":"2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128656638","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Development and Validation of Resistance-Capacitance Model for Phase Change Material Embedded in Porous Media","authors":"T. Alam, D. Bacellar, Jiazhen Ling, V. Aute","doi":"10.1109/iTherm54085.2022.9899532","DOIUrl":"https://doi.org/10.1109/iTherm54085.2022.9899532","url":null,"abstract":"A simple and effective way to enhance PCM thermal conductivity is by embedding porous materials with high thermal conductivities. In this work, CFD was used to evaluate the melting of PCM embedded in metal foam supplied with constant heat flux. Good agreement between experimental and numerical results has been found with a mean PCM local temperature deviation of 1.62K and 2.97K in two locations. The CFD simulation time was 56 hours for 6.5 hours of flow time. A computationally efficient resistance capacitance-based model (RCM) was developed to improve simulation speed. The proposed RCM exhibited mean local temperature deviations of 1.86K and 2.96K when compared against the experimental data for two thermocouple positions, however, it was approximately 2.5x105 times faster than CFD. The charging time deviation was less than 1% compared to CFD, and no significant change in thermal energy stored was observed since the temperature differences were small enough to result in insignificant sensible heat deviation. A simulation cost-effectiveness index (CEI) considering accuracy and computational affordability was introduced; the CEI of the RCM solver is 103 times better compared to CFD for the prediction of local PCM temperature.","PeriodicalId":351706,"journal":{"name":"2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116745911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Advancement of GaN HEMT Power Electronics on Diamond Substrate","authors":"Mei-chien Lu","doi":"10.1109/iTherm54085.2022.9899657","DOIUrl":"https://doi.org/10.1109/iTherm54085.2022.9899657","url":null,"abstract":"Wide bandgap power electronics have been commercialized for many applications. Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) has superior performance in high frequency applications. The outstanding concerns are the self-heating and thermal dissipation due to high current density through the piezoelectric channel exhibiting as a two-dimensional electron gas (2DEG). Substrates, silicon or silicon carbide, support GaN epitaxial processing limit the thermal transport ability. Alternative substrate materials for device level heat spreader with high thermal conductivity have been considered for substrate transfer technology to extend the application ranges. Among them, diamond has the highest thermal conductivity but is challenged by high cost and fabrication difficulties. Although GaN HEMT on Diamond has been studied for many years, the challenges remain in many aspects for implementation. This study summarizes and analyzes the crucial factors of materials, processing, and integration schemes of diamond heat spreader technologies in recent advancement. The effective thermal boundary resistance between GaN and Diamond is chosen as a parameter for comparisons. Advantages and disadvantages of direct polycrystalline growth and direct bonding methods are also discussed. The impacts on device performances, sizes, costs, the preferable applications gaining benefits and momentum, the manufacturing challenges, and the desired future improvement are also highlighted.","PeriodicalId":351706,"journal":{"name":"2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)","volume":"682 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116109137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Finite Element Modeling Strategies for Studying Mechanical Design Tradeoffs in Heterogeneously Integrated Packages","authors":"David N. Halbrooks, G. Subbarayan, Huayan Wang, G. Refai-Ahmed, S. Ramalingam","doi":"10.1109/iTherm54085.2022.9899540","DOIUrl":"https://doi.org/10.1109/iTherm54085.2022.9899540","url":null,"abstract":"The limits of area scaling leading to a slowdown of Moore’s law dictum on transistor scaling has driven significant 2.5D and 3D heterogeneously integrated package development. A general modeling strategy that enables efficient design trade-offs decisions to steer early product development of complex heterogeneously integrated packages is largely missing in the existing literature. Efficient numerical modeling strategies are necessary to carry out fast analysis, which in turn will enable quick early design decisions. Since finite element analysis is the most common numerical modeling technique for electronic packages, in this paper, finite element modeling strategies are systematically developed that have general applicability for complex heterogeneously integrated packages. The challenges addressed in the paper include (1) CAD geometry import, cleanup, model construction, and verification (2) structural modeling complexity and analysis speed trade-offs, including the choice of using shell elements instead of solid elements, and using beam elements for vertical interconnects (3) using rigid bars, beams and springs to interconnect various components modeled using shell or solid elements and (4) analyzing mechanical responses driven by the heatsink assembly process through enforced forces versus enforced displacements. The computational cost of the modeling alternatives is systematically evaluated on a complex heterogeneously integrated package consisting of an optical module mounted on a substrate using elastomeric contacts and integrated with a large Field Programmable Gate Array (FPGA) die assembled onto the substrate using C4 solder joints. The final modeling approximations ensure analysis times of the order a minute on a desktop computer to enable quick early design decisions to be influenced with \"reasonable\" design-oriented analysis accuracy. A parametric study is then carried out by systematically evaluating heatsink clamping spring design choices and exploring their impact on the deformation of the package. The modeling approach developed here is expected to be generally valid for making early design decisions in a wide variety of heterogeneously integrated packages that are currently being developed in the industry.","PeriodicalId":351706,"journal":{"name":"2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116125707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Indentation Creep Properties Evolution of Lead-Free Solder Joints Subjected to Thermal Cycling","authors":"M. Belhadi, Xin Wei, Qais Qasaimeh, P. Vyas, R. Zhao, Ehab Hmasha, Duha Ali, J. Suhling, S. Hamasha, P. Lall, Haneen Ali, B. Prorok","doi":"10.1109/iTherm54085.2022.9899582","DOIUrl":"https://doi.org/10.1109/iTherm54085.2022.9899582","url":null,"abstract":"Solder interconnections undergo thermomechanical stress when exposed to temperature changes. This leads to the evolution of the microstructure and the degradation of mechanical properties, causing component failure. Doped lead-free solders have substituted traditional SnPb solders for harsh applications. These alloys have been found to improve the mechanical and thermal fatigue properties of solder joints. However, few studies have investigated the evolution of the creep properties of lead-free solder joints in thermal cycling tests. This paper examines the creep properties of newly developed solder alloys during thermal cycling. The study focused on three solder alloys: SAC305, SAC-3Bi, and Sn63Pb37. The tested component was 15 x 15 mm CABGA208. The thermal cycling profile ranged between -40°C and +125 °C with a ramp rate of 10 °C/min and a dwell time of 15 min at extreme temperatures. A microindentation test was performed for individual solder joints using a cylindrical flat tip at room temperature. Three different loads were applied, with three replicates at 0, 100, 250, and 650 cycles for each test combination. The results showed that the dopped solder alloys demonstrated a decrease in creep rate until 250 cycles. However, SnPb and SAC305 alloys were found to deform more when the number of cycles increased.","PeriodicalId":351706,"journal":{"name":"2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128286510","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}