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ESSDERC '87: 17th European Solid State Device Research Conference最新文献

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Trench Isolation Schemes for Bipolar Devices --- Benefits and Limiting Aspects 双极器件沟槽隔离方案——优点和局限性
ESSDERC '87: 17th European Solid State Device Research Conference Pub Date : 1987-09-01 DOI: 10.1007/978-3-642-74360-3_4
H. Goto, K. Inayoshi
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引用次数: 2
Self-Aligned Technology for Sub-100nm Deep Base Junction Transistors 亚100nm深基结晶体管的自对准技术
ESSDERC '87: 17th European Solid State Device Research Conference Pub Date : 1987-09-01 DOI: 10.1007/978-3-642-74360-3_2
M. Nakamae
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引用次数: 0
Trends in Heterojunction Silicon Bipolar Transistors 异质结硅双极晶体管的发展趋势
ESSDERC '87: 17th European Solid State Device Research Conference Pub Date : 1987-09-01 DOI: 10.1007/978-3-642-74360-3_7
R. Mertens, J. Nijs, J. Symons, K. Baert, M. Ghannam
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引用次数: 1
Vertical Scaling Considerations for Polysilicon-Emitter Bipolar Transistors 多晶硅-发射极双极晶体管的垂直缩放考虑
ESSDERC '87: 17th European Solid State Device Research Conference Pub Date : 1987-09-01 DOI: 10.1007/978-3-642-74360-3_3
H. Schaber, J. Bieger, B. Benna, T. Meister
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引用次数: 13
A Salicide Base Contact Technology (SCOT) for Use in High Speed Bipolar VLSI 用于高速双极VLSI的盐基触点技术(SCOT)
ESSDERC '87: 17th European Solid State Device Research Conference Pub Date : 1987-09-01 DOI: 10.1007/978-3-642-74360-3_5
T. Hirao, T. Ikeda, Yoichi Kuramisu
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引用次数: 0
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