2014 12th IEEE International Conference on Embedded and Ubiquitous Computing最新文献_第4页

On the Black-Box Stand-by Recognition Strategies in Smart Homes Environments 智能家居环境下的黑匣子待机识别策略研究

2014 12th IEEE International Conference on Embedded and Ubiquitous Computing Pub Date : 2014-08-26 DOI: 10.1109/EUC.2014.40

Mario Caruso, A. Cerocchi

{"title":"On the Black-Box Stand-by Recognition Strategies in Smart Homes Environments","authors":"Mario Caruso, A. Cerocchi","doi":"10.1109/EUC.2014.40","DOIUrl":"https://doi.org/10.1109/EUC.2014.40","url":null,"abstract":"The number of smart devices connected h24 to the electric plant of an house is continuously growing with a clear impact on the energy consumption footprint. In the near future the stand-by consumption of these appliances will represent about the 15% of the total house consumption, a remarkable percentage intended to increase due to the growing number of smart devices contained in the house of tomorrow. In the presented scenario smart houses play an important role to reduce the stand-by consumption footprint introducing new strategies able to autonomously recognize these energy wastes. In 1999 the International Energy Agency launched the one-watt initiative with the aim of fighting this problem, today's smart homes can contribute to reduce the phenomenon with a 60% saving. Different strategies can be used in order to recognize a stand-by state, they can be divided in supervised and unsupervised approaches. In this paper we present an algorithm for each kind of approach comparing the performance of the two single approaches with the aim of proving that unsupervised techniques are ready to be widely adopted. An experimental evaluation concludes the paper.","PeriodicalId":331736,"journal":{"name":"2014 12th IEEE International Conference on Embedded and Ubiquitous Computing","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116862992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Task-I/O Co-scheduling for Pfair Real-Time Scheduler in Embedded Multi-core Systems 嵌入式多核系统中Pfair实时调度程序的任务i /O协同调度

2014 12th IEEE International Conference on Embedded and Ubiquitous Computing Pub Date : 2014-08-26 DOI: 10.1109/EUC.2014.16

Sangsoo Park

{"title":"Task-I/O Co-scheduling for Pfair Real-Time Scheduler in Embedded Multi-core Systems","authors":"Sangsoo Park","doi":"10.1109/EUC.2014.16","DOIUrl":"https://doi.org/10.1109/EUC.2014.16","url":null,"abstract":"Real-time embedded systems often require the ability of robust controls because interactions between the embedded systems and their physical environment that dynamically changes. Multi-core chips are regarded as ideal candidate hardware components for such environments, since each of them carries two or more cores on a single die, and has potential for providing execution parallelism as well as better performance at low cost. Parallelism, on the other hand, necessitates complex analysis of computation problems, such as task scheduling, while improving the realization of embedded controls. Pfair is an optimal scheduling algorithm that can fully utilize all cores in the system, but it incurs an excessive scheduling overhead which, in turn, diminishes its practicality in embedded systems. To mitigate this problem, hybrid partitioned-global Pfair (HPGP) scheduler was proposed, which significantly reduces the number of task migrations and global scheduling points by performing global scheduling only when absolutely necessary, while still achieving full processor utilization. This paper further extends the HPGP scheduler to support the robustness to interactions with the physical environment. Our evaluation results have shown that the extended HPGP can successfully limits the increase in response time caused by the hardware interrupts for physical interactions under a wide range of system utilization conditions., thus making it suitable for embedded real-time systems.","PeriodicalId":331736,"journal":{"name":"2014 12th IEEE International Conference on Embedded and Ubiquitous Computing","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131764104","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Understanding the Dynamic Caches on Intel Processors: Methods and Applications 理解英特尔处理器上的动态缓存:方法和应用

2014 12th IEEE International Conference on Embedded and Ubiquitous Computing Pub Date : 2014-08-26 DOI: 10.1109/EUC.2014.18

Yi Zhang, Nan Guan, W. Yi

{"title":"Understanding the Dynamic Caches on Intel Processors: Methods and Applications","authors":"Yi Zhang, Nan Guan, W. Yi","doi":"10.1109/EUC.2014.18","DOIUrl":"https://doi.org/10.1109/EUC.2014.18","url":null,"abstract":"The design and implementation of caches on a given platform has significant impacts to many areas in computer system design. On chip-multiprocessors (CMP), new cache architectures are proposed to meet the rapidly increasing performance requirements. However, the cache architectures are usually not well-documented for commercial processors. This raises difficulties for people to precisely understand the working principle of many components of the processors, not only the cache itself, but also the related components like the whole memory subsystem. This paper aims at disclosing the working principle of the last level cache of Intel Ivy Bridge processors. First, we identify the address translation logic on this cache. Second, we disclose the replacement policy of the cache. This is a dynamic insertion replacement policy, which is very different from the widely used LRU policy and its variants. Although this replacement policy has been proposed in academic literatures, our work is the first one showing it is actually used in commercial processors. To show the significance of our discovery, we design a methodology to generate controllable cache miss sequences under this new cache, and apply it to the design of a benchmark to model the memory concurrency. Evaluations on physical machines are conducted to show the effectiveness of the proposed method.","PeriodicalId":331736,"journal":{"name":"2014 12th IEEE International Conference on Embedded and Ubiquitous Computing","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133445039","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Towards a Software Infrastructure for District Energy Management 面向区域能源管理的软件基础设施

2014 12th IEEE International Conference on Embedded and Ubiquitous Computing Pub Date : 2014-08-26 DOI: 10.1109/EUC.2014.39

E. Patti, A. Acquaviva, A. Sciacovelli, V. Verda, Dario Martellacci, Federico Boni Castagnetti, E. Macii

引用次数: 7

Using Early Power and Timing Estimations of Massively Heterogeneous Computation Platforms to Create Optimized HPC Applications 利用大规模异构计算平台的早期功耗和时间估计来创建优化的高性能计算应用

2014 12th IEEE International Conference on Embedded and Ubiquitous Computing Pub Date : 2014-08-26 DOI: 10.1109/EUC.2014.31

Patrick Knocke, Ralph Görgen, Jörg Walter, D. Helms, W. Nebel

{"title":"Using Early Power and Timing Estimations of Massively Heterogeneous Computation Platforms to Create Optimized HPC Applications","authors":"Patrick Knocke, Ralph Görgen, Jörg Walter, D. Helms, W. Nebel","doi":"10.1109/EUC.2014.31","DOIUrl":"https://doi.org/10.1109/EUC.2014.31","url":null,"abstract":"The ever rising energy and accordingly cooling demands are a major hurdle for the scalability of today's supercomputers. We are challenged with the need to increase computation performance to cope with the rising complexity of calculations on the one hand and the need to keep the energy/cooling demand stable or in the best case even to reduce it. Recently, one widely discussed way to do this is the integration of heterogeneous computation devices into the supercomputer systems as these tend to have a far better performance/energy ratio for large classes of applications. The obvious drawback of heterogeneous systems is the additional design complexity for the software development in order to efficiently use these devices in terms of performance as well as power. For this reason we propose a flow, which assists the software developer at design time, offering immediate power- and performance-estimation. Such approaches are already known in the embedded world, helping there to select between different design possibilities, and will be used to get the best possible performance from a massively heterogeneous computation platform, while still keeping the energy consumption in mind.","PeriodicalId":331736,"journal":{"name":"2014 12th IEEE International Conference on Embedded and Ubiquitous Computing","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120856641","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

TDOA Localization in Asynchronous WSNs 异步wsn中的TDOA定位

2014 12th IEEE International Conference on Embedded and Ubiquitous Computing Pub Date : 2014-08-26 DOI: 10.1109/EUC.2014.35

F. Bandiera, A. Coluccia, G. Ricci, F. Ricciato, D. Spano

引用次数: 13

Aircraft Distributed Flow Turbulence Sensor Network with Embedded Flow Control Actuators 带有嵌入式流量控制执行器的飞机分布式流量湍流传感器网络

2014 12th IEEE International Conference on Embedded and Ubiquitous Computing Pub Date : 2014-08-26 DOI: 10.1109/EUC.2014.34

L. Francioso, C. Pascali, P. Siciliano, M. D. Giorgi, E. Pescini, A. Ficarella

{"title":"Aircraft Distributed Flow Turbulence Sensor Network with Embedded Flow Control Actuators","authors":"L. Francioso, C. Pascali, P. Siciliano, M. D. Giorgi, E. Pescini, A. Ficarella","doi":"10.1109/EUC.2014.34","DOIUrl":"https://doi.org/10.1109/EUC.2014.34","url":null,"abstract":"Several active and passive flow control systems are studied to improve the performances of fluid machineries and to increase aerodynamic efficiency of propulsion systems. Among all the well-known active flow control devices, the dielectric barrier discharge plasma actuator (PA) is in full expansion and of great interest in the scientific community. A PA modifies the following behaviour of a fluid by providing an electronically controllable disturbance that brings to drag reduction, flow separation control, enhanced mixing, and noise suppression. PA is potentially easy to construct, has no moving parts and has low power requirements. This leads to its possible applications for separation control in low pressure turbine blade and compressor cascade, tip clearance flow control and compressor stability range extension. The present work reports the design and fabrication of cheap Kapton-based flow turbulence capacitive sensors able to be embedded into aircraft wing profiles and airfoil structures for critical turbulence conditions detection and early-detected separated flows control. The embedded system will provide a Kapton-foil based pressure detection and linear/synthetic jet plasma actuators working in feedback, for prevention and active reduction of separated flow for regional aircraft applications.","PeriodicalId":331736,"journal":{"name":"2014 12th IEEE International Conference on Embedded and Ubiquitous Computing","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116654831","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain Delft工作台硬件/软件协同设计工具链中的高级综合

2014 12th IEEE International Conference on Embedded and Ubiquitous Computing Pub Date : 2014-08-26 DOI: 10.1109/EUC.2014.28

R. Nane, V. Sima, C. Pham-Quoc, F. Gonçalves, K. Bertels

{"title":"High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain","authors":"R. Nane, V. Sima, C. Pham-Quoc, F. Gonçalves, K. Bertels","doi":"10.1109/EUC.2014.28","DOIUrl":"https://doi.org/10.1109/EUC.2014.28","url":null,"abstract":"High-level synthesis (HLS) is an automated design process that deals with the generation of behavioral hardware descriptions from high-level algorithmic specifications. The main benefit of this approach is that ever-increasing system-on-chip (SoC) design complexity and ever-shorter time-to-market can still be both manageable and achievable. This advantage, coupled with the increasing number of available heterogeneous platforms that loosely couple general-purpose processors with Field Programmable Gate Array-based co-processors, led to an increasing attention for HLS tool development and optimization from both the academia as well as the industry. However, in order for HLS to fully reach its potential, it is imperative to look simultaneously at local HLS optimizations as well as to HLS system-level integration and design space exploration issues. In this paper, we present the Delft Workbench tool-chain that takes C-code as input and generates, in a semi-automatic way, a complete system. Subsequently, we describe the design and output code optimization of the DWARV 3.0 HLS compiler using the CoSy compiler framework. Based on this experience, we provide an overview of similarities and differences in leveraging this commercial compiler framework to build a hardware compiler as opposed to building a software compiler. Finally, we report speedups up to 3.72x at application level and development times measurable in hours rather than weeks.","PeriodicalId":331736,"journal":{"name":"2014 12th IEEE International Conference on Embedded and Ubiquitous Computing","volume":"25 56","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132546517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

Vehicle Activity Analysis Based on ANPR System 基于ANPR系统的车辆活动分析

2014 12th IEEE International Conference on Embedded and Ubiquitous Computing Pub Date : 2014-08-26 DOI: 10.1109/EUC.2014.22

Yuyan Sun, Xinyun Zhou, Limin Sun, Shuixian Chen

引用次数: 3

Mobile Augmented Reality System for Marine Navigation Assistance 海上导航辅助移动增强现实系统

2014 12th IEEE International Conference on Embedded and Ubiquitous Computing Pub Date : 2014-08-26 DOI: 10.1109/EUC.2014.49

Jean-Christophe Morgère, J. Diguet, J. Laurent

引用次数: 10