2017 19th International Symposium on Computer Architecture and Digital Systems (CADS)最新文献

Impact of increasing number of neurons on performance of neuromorphic architecture 神经元数量增加对神经形态结构性能的影响

2017 19th International Symposium on Computer Architecture and Digital Systems (CADS) Pub Date : 2017-12-21 DOI: 10.1109/CADS.2017.8310732

Mahyar Shahsavari, Pierre Boulet, A. Shahbahrami, S. Hamdioui

引用次数: 0

Bamshad: A JIT compiler for running Java stream APIs on heterogeneous environments Bamshad:用于在异构环境中运行Java流api的JIT编译器

2017 19th International Symposium on Computer Architecture and Digital Systems (CADS) Pub Date : 2017-12-01 DOI: 10.1109/CADS.2017.8310734

Bahram Yarahmadi, F. Khunjush

{"title":"Bamshad: A JIT compiler for running Java stream APIs on heterogeneous environments","authors":"Bahram Yarahmadi, F. Khunjush","doi":"10.1109/CADS.2017.8310734","DOIUrl":"https://doi.org/10.1109/CADS.2017.8310734","url":null,"abstract":"Nowadays, Graphics Processing Units (GPUs) and other types of emerging accelerators have an important role in high-performance computing. These devices can be leveraged in a wide range of applications through using appropriate programming environments such as CUDA and OpenCL which lead to reaching high-performance applications. However, on one hand, programming GPUs is a painful and error-prone task and requires a great amount of expertise especially in low-level architectural features as well as their memory management in order to achieve reasonable performance. On the other hand, enabling running high-level programming languages such as Java with massive computational power of today's GPUs can lessen the burden of this complexity. Considering new features in Java 8 such as lambda functions which are used in Java parallel streams, supporting these new features is vital to use these devices in real applications. In this paper, we introduce a just-in-time compiler, named Bamshad, which ports lambda functions used in Java parallel streams to GPU at runtime. For this, a series of compiler techniques are adopted to transparently eliminate unnecessary data communication between CPUs and GPUs. With our approach, a programmer is not involved in the detailed process of tuning a GPU device for reducing the amount of communication. The experimental results show that the proposed JIT compiler yields 13× improvement in comparison to sequential Java execution for all benchmarks. Also, in comparison to parallel Java, our work yields 3.9× improvement.","PeriodicalId":321346,"journal":{"name":"2017 19th International Symposium on Computer Architecture and Digital Systems (CADS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126944967","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

PAMS: A new position-aware multi-sensor dataset for human activity recognition using smartphones PAMS:一种新的位置感知多传感器数据集，用于智能手机的人类活动识别

2017 19th International Symposium on Computer Architecture and Digital Systems (CADS) Pub Date : 2017-12-01 DOI: 10.1109/CADS.2017.8310680

Pegah Esfahani, H. Malazi

{"title":"PAMS: A new position-aware multi-sensor dataset for human activity recognition using smartphones","authors":"Pegah Esfahani, H. Malazi","doi":"10.1109/CADS.2017.8310680","DOIUrl":"https://doi.org/10.1109/CADS.2017.8310680","url":null,"abstract":"Nowadays smartphones are ubiquitous in various aspects of our lives. The processing power, communication bandwidth, and the memory capacity of these devices have surged considerably in recent years. Besides, the variety of sensor types, such as accelerometer, gyroscope, humidity sensor, and bio-sensors, which are embedded in these devices, opens a new horizon in self-monitoring of physical daily activities. One of the primary steps for any research in the area of detecting daily life activities is to test a detection method on benchmark datasets. Most of the early datasets limited their work to collecting only a single type of sensor data such as accelerometer data. While some others do not consider age, weight, and gender of the subjects who have participated in collecting their activity data. Finally, part of the previous works collected data without considering the smartphone's position. In this paper, we introduce a new dataset, called Position-Aware Multi-Sensor (PAMS). The dataset contains both accelerometer and gyroscope data. The gyroscope data boosts the accuracy of activity recognition methods as well as enabling them to detect a wider range of activities. We also take the user information into account. Based on the biometric attributes of the participants, a separate learned model is generated to analyze their activities. We concentrate on several major activities, including sitting, standing, walking, running, ascending/descending stairs, and cycling. To evaluate the dataset, we use various classifiers, and the outputs are compared to the WISDM. The results show that using aforementioned classifiers, the average precision for all activities is above 88.5%. Besides, we measure the CPU, memory, and bandwidth usage of the application collecting data on the smartphone.","PeriodicalId":321346,"journal":{"name":"2017 19th International Symposium on Computer Architecture and Digital Systems (CADS)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132261242","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 18

Towards a robust and efficient EM based authentication of FPGA against counterfeiting and recycling 针对FPGA的伪造和回收，提出了一种鲁棒高效的基于EM的认证方法

2017 19th International Symposium on Computer Architecture and Digital Systems (CADS) Pub Date : 2017-12-01 DOI: 10.1109/CADS.2017.8310673

Mosabbah Mushir Ahmed, D. Hély, N. Barbot, R. Siragusa, E. Perret, M. Bernier, F. Garet

{"title":"Towards a robust and efficient EM based authentication of FPGA against counterfeiting and recycling","authors":"Mosabbah Mushir Ahmed, D. Hély, N. Barbot, R. Siragusa, E. Perret, M. Bernier, F. Garet","doi":"10.1109/CADS.2017.8310673","DOIUrl":"https://doi.org/10.1109/CADS.2017.8310673","url":null,"abstract":"Counterfeiting of integrated circuits (IC) has become a serious concern for semiconductor industry. It is necessary to find a robust solution which is both efficient and low cost in terms of implementation in order to detect and avoid the counterfeiting of ICs. Also, the solution must be resistant against aging and other reliability effects. In this paper we have proposed a scheme to utilize radiated Electromagnetic (EM) emission from the IC to create a fingerprint. Our proposed scheme exploits manufacturing based process variation (PV), which continues to dominate in the nanoscale technologies. We have deployed variability-aware circuit (VAC) design that generates radiated EM emission and performs realistic assessment of the PV effects. Generated EM response is treated to different encoding metrics to quantize it as a fingerprint for the IC. Latter part of the paper validates that the fingerprint is stable after the aging effects of IC. To validate our proposed scheme measurements are carried out over several FPGA boards.","PeriodicalId":321346,"journal":{"name":"2017 19th International Symposium on Computer Architecture and Digital Systems (CADS)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114127615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

NOMeS: Near-optimal metaheuristic scheduling for MPSoCs mpsoc的近最优元启发式调度

2017 19th International Symposium on Computer Architecture and Digital Systems (CADS) Pub Date : 2017-12-01 DOI: 10.1109/CADS.2017.8310723

Amin Majd, M. Daneshtalab, J. Plosila, N. Khalilzad, Golnaz Sahebi, E. Troubitsyna

引用次数: 5

Evolutionary architecture design for approximate DCT 近似DCT的演化结构设计

2017 19th International Symposium on Computer Architecture and Digital Systems (CADS) Pub Date : 2017-12-01 DOI: 10.1109/CADS.2017.8310731

Abbas Azaraien, Babak Djalaei, M. Salehi

引用次数: 1

NOC characteristics of cloud applications 云应用的NOC特征

2017 19th International Symposium on Computer Architecture and Digital Systems (CADS) Pub Date : 2017-12-01 DOI: 10.1109/CADS.2017.8310674

P. Lotfi-Kamran, M. Modarressi, H. Sarbazi-Azad

{"title":"NOC characteristics of cloud applications","authors":"P. Lotfi-Kamran, M. Modarressi, H. Sarbazi-Azad","doi":"10.1109/CADS.2017.8310674","DOIUrl":"https://doi.org/10.1109/CADS.2017.8310674","url":null,"abstract":"Cloud applications have abundant request-level parallelism, and as a result, many-core server processors are good candidates for their execution. A key component in a many-core processor is the network-on-chip (NOC) that connects cores to cache banks and memory, and acts as the medium for delivering instructions and data to the cores. While cloud applications are an important class of massively-parallel workloads that benefit from many-core processors and networks-on-chip, there is no comprehensive study for the NOC requirements of these workloads. In this work, we use full-system simulation and a set of cloud applications to study the characteristics and requirements of these applications with respect to networks-on-chip. We find that NOC latency is the most important optimization criterion for these workloads. As NOC traffic of these workloads is relatively low and approximately follows uniform traffic, we find that knobs like routing algorithm and buffer size that mostly affect NOC bandwidth, beyond a certain point, have little impact on the performance of these workloads. On the other hand, techniques that reduce NOC latency directly improve the performance of cloud applications.","PeriodicalId":321346,"journal":{"name":"2017 19th International Symposium on Computer Architecture and Digital Systems (CADS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132259438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

UTIC: A toolchain for enumeration and selection of custom instructions UTIC:用于枚举和选择自定义指令的工具链

2017 19th International Symposium on Computer Architecture and Digital Systems (CADS) Pub Date : 2017-12-01 DOI: 10.1109/CADS.2017.8310727

Mahdi Mohammadpour Fard, Mostafa Ersali Salehi Nasab

引用次数: 0

RI-COTS: Trading performance for reliability improvements in commercial of the shelf systems RI-COTS:商业货架系统可靠性改进的交易性能

2017 19th International Symposium on Computer Architecture and Digital Systems (CADS) Pub Date : 2017-12-01 DOI: 10.1109/CADS.2017.8310724

Golsa Ghasemi, Amir Mahdi Hosseini Monazzah, Hamed Farbeh

引用次数: 1

Efficient mapping of DNA logic circuits on parallelized digital microfluidic architcture 并行数字微流控结构上DNA逻辑电路的高效映射

2017 19th International Symposium on Computer Architecture and Digital Systems (CADS) Pub Date : 2017-12-01 DOI: 10.1109/CADS.2017.8310679

Z. Beiki, M. Taajobian, A. Jahanian

{"title":"Efficient mapping of DNA logic circuits on parallelized digital microfluidic architcture","authors":"Z. Beiki, M. Taajobian, A. Jahanian","doi":"10.1109/CADS.2017.8310679","DOIUrl":"https://doi.org/10.1109/CADS.2017.8310679","url":null,"abstract":"DNA is known as the basic element for storing the life codes and transferring the genetic features through the generations. However, it is found that DNA molecules can be utilized for a new kind of computation that opens fascinating horizons in computation and medical sciences. Significant contributions are addressed on design of DNA-based logic gates for medical and computational applications. Microfluidic biochips are known as efficient platforms to implement the DNA circuits but current biochips architectures allow sequential implementation of DNA modules that leads to increase the run time. In this paper, a new Microfluidic biochip architecture and corresponding CAD flow is presented for parallel implementation of DNA circuits. In this flow, Verilog description of the circuit files are synthesized and converted into a bioassay file format. Then assay files are implemented on a microfluidic biochip based on parallel architecture that mane is PBCM architecture. Experimental results show that the experimental time of assays and pin number of biochips are reduced by 17% and 23% respectively.","PeriodicalId":321346,"journal":{"name":"2017 19th International Symposium on Computer Architecture and Digital Systems (CADS)","volume":"91 21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128786128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1