Proceedings of the 47th International Conference on Parallel Processing最新文献_第6页

Heterogeneous Wireless Charger Placement with Obstacles 具有障碍物的异构无线充电器放置

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225079

Xiaoyu Wang, Haipeng Dai, Weijun Wang, Jiaqi Zheng, Guihai Chen, Wanchun Dou, Xiaobing Wu

{"title":"Heterogeneous Wireless Charger Placement with Obstacles","authors":"Xiaoyu Wang, Haipeng Dai, Weijun Wang, Jiaqi Zheng, Guihai Chen, Wanchun Dou, Xiaobing Wu","doi":"10.1145/3225058.3225079","DOIUrl":"https://doi.org/10.1145/3225058.3225079","url":null,"abstract":"This paper considers the problem of Heterogeneous wIreless charger Placement with Obstacles (HIPO), i.e., given a number of heterogeneous rechargeable devices distributed on a 2D plane where obstacles of arbitrary shapes exist, deploying heterogeneous chargers with a given cardinality of each type, i.e., determining their positions and orientations, the combination of which we name as strategies, on the plane such that the rechargeable devices achieve maximized charging utility. After presenting our practical directional charging model, we first propose to use a piecewise constant function to approximate the nonlinear charging power, and divide the whole area into multi-feasible geometric areas in which a certain type of chargers have constant approximated charging power. Next, we propose the Practical Dominating Coverage Set extraction algorithm to reduce the unlimited solution space to a limited one by exacting a finite set of candidate strategies for all multi-feasible geometric areas. Finally, we prove the problem falls in the realm of maximizing a monotone submodular function subject to a partition matroid constraint, which allows a greedy algorithm to solve with approximation ratio of 1/2 -- ϵ. We conduct both simulations and field experiments to evaluate the performance of our algorithm and other five comparison algorithms. The results show that our algorithm outperforms the comparison algorithms by at least 33.49% on average.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130420104","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 17

ParaPLL

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225061

Kun Qiu, Yuanyang Zhu, Jing Yuan, Jin Zhao, Xin Wang, T. Wolf

{"title":"ParaPLL","authors":"Kun Qiu, Yuanyang Zhu, Jing Yuan, Jin Zhao, Xin Wang, T. Wolf","doi":"10.1145/3225058.3225061","DOIUrl":"https://doi.org/10.1145/3225058.3225061","url":null,"abstract":"Determining the shortest-path distance between vertices in the weighted graph is an important problem for a broad range of fields, such as context-aware search and route selection. While many efficient methods for querying shortest-path distance have been proposed, they are poorly suited for parallel architectures, such as multi-core CPUs or computer clusters, due to the strong task dependencies. In this paper, we propose ParaPLL, a new parallelism-friendly framework for fast shortest-path distance query on large-scale weighted graphs. ParaPLL exploits intra-node and inter-node parallelism by using shared memory and message passing paradigms respectively. We also design task assignment and synchronization policies, which allow ParaPLL to reach remarkable speedups compared to state-of-the-art solutions. Moreover, we also prove the correctness of ParaPLL. To the best of our knowledge, ParaPLL is the first parallel framework that utilizing pruned landmark labeling to accelerate shortest-path distance queries on large-scale weighted graphs. Our evaluation results show that ParaPLL is 9.46 times faster than the corresponding serial version on a weighted 0.3M-vertex graph using a 12-core computer. ParaPLL on a 6-node computer cluster can also achieve a speedup of up to 5.6 over the single-node implementation.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"359 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122758820","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Learning Driven Parallelization for Large-Scale Video Workload in Hybrid CPU-GPU Cluster CPU-GPU混合集群中大规模视频工作负载的学习驱动并行化

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225070

Haitao Zhang, Bingchang Tang, Xin Geng, Huadong Ma

{"title":"Learning Driven Parallelization for Large-Scale Video Workload in Hybrid CPU-GPU Cluster","authors":"Haitao Zhang, Bingchang Tang, Xin Geng, Huadong Ma","doi":"10.1145/3225058.3225070","DOIUrl":"https://doi.org/10.1145/3225058.3225070","url":null,"abstract":"Hybrid CPU-GPU cluster has become a promising computing paradigm for large-scale video analytics. However, the uncertainty and variability of workloads and heterogeneous resources in the cluster can lead to the unbalanced use of the hybrid computing resources and further cause the performance degradation of the computing platform. This problem becomes more challenging with the computation complexity and dependencies of video tasks in the hybrid cluster. In this paper, we focus on the video workload parallelization problem with fine-grained task division and feature description in the hybrid CPU-GPU cluster. Firstly, for achieving high resource utilization and task throughput, we propose a two-stage video task scheduling approach based on deep reinforcement learning. In our approach, a task execution node is selected by the cluster-level scheduler for the mutually independent video tasks, and then the node-level scheduler assigns the interrelated video subtasks to the appropriate computing units. By using the deep Q-network, the two-stage scheduling model is online learned to perform the current optimal scheduling actions according to the runtime status of cluster environments, the characteristics of video tasks, and the dependencies between video tasks. Secondly, based on the transfer learning technology, a scheduling strategy generalization method is proposed to efficiently rebuild the task scheduling model referring to the existing model. Finally, we conduct the extensive experiments to analyze the impact of the model parameters on the scheduling actions, and then the experimental results also validate that our learning based task scheduling approach outperforms the other widely used methods.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124422764","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Using Static Allocation Algorithms for Matrix Matrix Multiplication on Multicores and GPUs 在多核和gpu上使用静态分配算法求解矩阵乘法

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225066

Lionel Eyraud-Dubois, Thomas Lambert

引用次数: 2

Efficient SSD Caching by Avoiding Unnecessary Writes using Machine Learning 通过使用机器学习避免不必要的写，高效的SSD缓存

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225126

Hua Wang, Xinbo Yi, Ping Huang, Bin Cheng, Ke Zhou

{"title":"Efficient SSD Caching by Avoiding Unnecessary Writes using Machine Learning","authors":"Hua Wang, Xinbo Yi, Ping Huang, Bin Cheng, Ke Zhou","doi":"10.1145/3225058.3225126","DOIUrl":"https://doi.org/10.1145/3225058.3225126","url":null,"abstract":"SSD has been playing a significantly important role in caching systems due to its high performance-to-cost ratio. Since cache space is much smaller than that of the backend storage by one order of magnitude or even more, write density (writes per unit time and space) of SSD cache is therefore much higher than that of HDD storage, which brings about great challenges to SSD's lifetime. Meanwhile, under social network workloads, quite a few writes on SSD are unnecessary, e.g., Tencent's photo caching shows that about 61% of total photos are just accessed once whereas they are still swapped in and out of the cache. Therefore, if we can predict this kind of photos proactively and prevent them from entering the cache, we can eliminate unnecessary SSD cache writes and improve cache space utilization. To cope with the challenge, we put forward a \"one-time-access criteria\" that is applied to cache space, and further propose a \"one-time-access-exclusion\" policy. Based on that, we design a prediction-based classifier to facilitate the policy. Unlike the state-of-the-art history-based predictions, our prediction is non-history-oriented, which is challenging to achieve a good prediction accuracy. To address this issue, we integrate a decision tree into the classifier, extract social-related information as classifying features, and apply cost sensitive learning to improve classification precision. Due to these techniques, we attain a predication accuracy over 80%. Experimental results show that \"one-time-access-exclusion\" approach makes caching performance outstanding in most aspects, taking LRU for instance, hit rate is improved by 17%, cache writes are decreased by 79%, and the average access latency is dropped by 7.5%.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125417598","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 28

PBCS

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225097

Juan Zhao, Junqiang Song, Min Zhu, Jincai Li, Zhenyu Huang, Xiaoyong Li, Xiaoli Ren

{"title":"PBCS","authors":"Juan Zhao, Junqiang Song, Min Zhu, Jincai Li, Zhenyu Huang, Xiaoyong Li, Xiaoli Ren","doi":"10.1145/3225058.3225097","DOIUrl":"https://doi.org/10.1145/3225058.3225097","url":null,"abstract":"Solving Boolean polynomial systems as an important aspect of symbolic computation, plays a fundamental role in various real applications. Although there exist many efficient sequential algorithms for solving Boolean polynomial systems, they are inefficient or even unavailable when the problem scale becomes large, due to the computational complexity of the problem and the limited processing capability of a single node. In this paper we propose an efficient parallel characteristic set method called PBCS for solving Boolean polynomial systems under the high-performance computing environment. Specifically, PBCS takes full advantage of the state-of-the-art characteristic set method and achieves load balancing by dynamically reallocating tasks. Moreover, the performance is further improved by optimizing the parameter setting. Extensive experiments are conducted to demonstrate that PBCS is efficient and scalable for solving Boolean equations, especially for the equations rasing from stream ciphers that have block triangular structure. In addition, the algorithm has good scalability and can be extended to the size of thousands CPU cores with a stable speedup.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125376942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

A Multilevel Subtree Method for Single and Batched Sparse Cholesky Factorization 单次和批处理稀疏choolesky分解的多级子树方法

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225090

Meng Tang, M. Gadou, S. Rennich, T. Davis, S. Ranka

{"title":"A Multilevel Subtree Method for Single and Batched Sparse Cholesky Factorization","authors":"Meng Tang, M. Gadou, S. Rennich, T. Davis, S. Ranka","doi":"10.1145/3225058.3225090","DOIUrl":"https://doi.org/10.1145/3225058.3225090","url":null,"abstract":"Scientific computing relies heavily on matrix factorization. Cholesky factorization is typically used to solve the linear equation system Ax = b where A is symmetric and positive definite. A large number of applications require operating on sparse matrices. A major overhead with factorization of sparse matrices on GPUs is addressing the cost of transferring the data from the CPU to the GPU. Additionally, the computational efficiency of factorization of small dense matrices has to be addressed. In this paper, we develop a multilevel subtree method for Cholesky factorization of large sparse matrices on single and multiple GPUs. This approach effectively addresses two important limitations of previous methods. First, by applying the subtree method to both lower levels and higher levels of the elimination tree, we improve the amount of concurrency and the computational efficiency. Previous approaches only used the subtree method at the lower levels. Second, we overlap computation of a subtree with another subtree, thereby reducing the overhead of the data transfer from CPU to GPU. Additionally, we propose the use of batched parallelism for applications that require simultaneous factorization of multiple matrices. Effectively, the tree structure of a collection of matrices can be derived by merging the individual trees. Our experimental results show that each of the three techniques result in significant performance improvement. Further, the combination of the three can result in a speedup of up to 2.43 on a variety of sparse matrices.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"148 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132146201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Revisiting Multi-pass Scatter and Gather on GPUs 重新访问gpu上的多通道散射和聚集

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225095

Zhuohang Lai, Qiong Luo, Xiaoying Jia

{"title":"Revisiting Multi-pass Scatter and Gather on GPUs","authors":"Zhuohang Lai, Qiong Luo, Xiaoying Jia","doi":"10.1145/3225058.3225095","DOIUrl":"https://doi.org/10.1145/3225058.3225095","url":null,"abstract":"Scatter and gather are two essential data-parallel primitives for memory-intensive applications. The performance challenge is in their irregular memory access patterns, especially on architectures with high memory latency, such as GPUs. Previous work has proposed multi-pass scatter and gather schemes to optimize their performance on earlier GPUs; on newer GPUs, nevertheless, anecdotal evidence showed that such schemes had little performance benefit on small datasets, and few studies have been conducted on larger datasets. Therefore, we propose a systematic study to re-evaluate the performance of multi-pass scatter and gather on three newer GPUs with various data sizes. Specifically, we micro-benchmark the undocumented Translation Lookaside Buffers (TLBs) on these GPUs to quantitatively analyze their performance impact. We then develop an analytical model to analyze the execution of irregular memory accesses and estimate the multi-pass performance. Our evaluation on the newer GPUs shows that (1) TLB caching can affect the performance of irregular memory accesses more significantly than data caching; (2) on datasets larger than the L3 TLB size, the multi-pass schemes, with a suitable number of passes, can reduce up to 87.8% of the execution time over the single-pass version due to better TLB locality. Our model can predict the multipass performance on various GPUs, with an average accuracy of 92.9%. It can further suggest a suitable number of passes for the best performance.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124010336","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

FFS-VA: A Fast Filtering System for Large-scale Video Analytics FFS-VA:用于大规模视频分析的快速过滤系统

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225103

Chen Zhang, Q. Cao, Hong Jiang, Wenhui Zhang, Jingjun Li, Jie Yao

{"title":"FFS-VA: A Fast Filtering System for Large-scale Video Analytics","authors":"Chen Zhang, Q. Cao, Hong Jiang, Wenhui Zhang, Jingjun Li, Jie Yao","doi":"10.1145/3225058.3225103","DOIUrl":"https://doi.org/10.1145/3225058.3225103","url":null,"abstract":"Surveillance video cameras are ubiquitous around us. Full-feature object-detection models such as YOLOv2 can automatically analyze surveillance videos in real-time with high accuracy while consuming huge computational resources. Directly applying these models for practical scenarios with large-scale deployed cameras requires prohibitively expensive computation. This, however, is both wasteful and unnecessary considering the fact that the concerned anomalous events occur rarely among these massive volumes of video streams. Therefore, in this paper, we propose a Fast Filtering System for Video Analytics (FFS-VA), a pipelined multi-stage video analyzing system, to make video analytics much cost-effective. FFS-VA is designed to filter out vast but non-target-object frames by two prepositive stream-specialized filters and a small full-function tiny-YOLO model, to drastically reduce the number of video frames arriving at the full-feature model in the back-end. FFS-VA presents a global feedback-queue mechanism to balance the processing rates of different filters in both intra-stream and inter-stream processes. FFS-VA also designs a dynamic batch technique to achieve an adjustable trade-off between throughput and latency. FFS-VA reasonably distributes all tasks on CPUs and GPUs to fully exploit the underlying hardware resources. We implement a FFS-VA prototype and evaluate FFS-VA against the state-of-the-art YOLOv2 under the same hardware and representative video workloads. The experimental results show that under a 10% target-object occurrence rate on two GPUs, FFS-VA can support up to 30 concurrent video streams (7x more than YOLOv2) in the online case, and obtain 3x speedup when offline analyzing a stream, with an accuracy loss of less than 2%.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128711237","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Energy-efficient Application Resource Scheduling using Machine Learning Classifiers 基于机器学习分类器的节能应用资源调度

Proceedings of the 47th International Conference on Parallel Processing Pub Date : 2018-08-13 DOI: 10.1145/3225058.3225088

Connor Imes, S. Hofmeyr, H. Hoffmann

{"title":"Energy-efficient Application Resource Scheduling using Machine Learning Classifiers","authors":"Connor Imes, S. Hofmeyr, H. Hoffmann","doi":"10.1145/3225058.3225088","DOIUrl":"https://doi.org/10.1145/3225058.3225088","url":null,"abstract":"Resource scheduling in high performance computing (HPC) usually aims to minimize application runtime rather than optimize for energy efficiency. Most existing research on reducing power and energy consumption imposes the constraint that little or no performance loss is allowed, which improves but still does not maximize energy efficiency. By optimizing for energy efficiency instead of application turnaround time, we can reduce the cost of running scientific applications. We propose using machine learning classification, driven by low-level hardware performance counters, to predict the most energy-efficient resource settings to use during application runtime, which unlike static resource scheduling dynamically adapts to changing application behavior. We evaluate our approach on a large shared-memory system using four complex bioinformatic HPC applications, decreasing energy consumption over the naive race scheduler by 20% on average, and by as much as 38%. An average increase in runtime of 31% is dominated by a 39% reduction in power consumption, from which we extrapolate the potential for a 24% increase in throughput for future over-provisioned, power-constrained clusters. This work demonstrates that low-overhead classification is suitable for dynamically optimizing energy efficiency during application runtime.","PeriodicalId":307809,"journal":{"name":"Proceedings of the 47th International Conference on Parallel Processing","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115617527","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 30