2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)最新文献

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A MM-wave monolithic Gilbert-cell mixer 毫米波单片吉尔伯特单元混频器
A. Dearn, L. Devlin
{"title":"A MM-wave monolithic Gilbert-cell mixer","authors":"A. Dearn, L. Devlin","doi":"10.1109/RFIC.2000.854463","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854463","url":null,"abstract":"This paper describes the application of the well-known Gilbert-cell mixer technique at MM-wave frequencies. A pseudomorphic HEMT monolithic design is described, in conjunction with a bondwire compensation technique, to produce low conversion loss (<4 dB) with low LO power at frequencies beyond 40 GHz.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"15 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125990942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Ka-band RF MEMS phase shifters for phased array applications 用于相控阵应用的ka波段射频MEMS移相器
B. Pillans, S. Eshelman, A. Malczewski, J. Ehmke, C. Goldsmith
{"title":"Ka-band RF MEMS phase shifters for phased array applications","authors":"B. Pillans, S. Eshelman, A. Malczewski, J. Ehmke, C. Goldsmith","doi":"10.1109/RFIC.2000.854447","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854447","url":null,"abstract":"RF MEMS switches provide a cheap and effective way to substantially reduce loss in RF and microwave MMICs. In this paper, progress in building low loss Ka-band phase shifters using RF MEMS capacitive switches is demonstrated. Using a switched transmission line 4-bit resonant phase shifter, an average insertion loss of 2.25 dB was obtained with better than 15 dB return loss. A similar 3-bit phase shifter produced an average insertion loss of 1.7 dB with better than 13 dB return loss. A simple, low loss way to package these devices is also presented.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124107162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
Ultra low power GaAs MMIC low noise amplifier for smart antenna combining at 5.2 GHz 用于5.2 GHz智能天线组合的超低功耗GaAs MMIC低噪声放大器
F. Ellinger, U. Lott, W. Bachtold
{"title":"Ultra low power GaAs MMIC low noise amplifier for smart antenna combining at 5.2 GHz","authors":"F. Ellinger, U. Lott, W. Bachtold","doi":"10.1109/RFIC.2000.854438","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854438","url":null,"abstract":"A switchable GaAs MMIC cascode low noise amplifier for smart antenna combining at 5.2 GHz (HIPERLAN) is presented using a standard 0.6 /spl mu/m MESFET process. A gain of 12.3 dB and a noise figure of 2.4 dB are measured, drawing only 1.2 mA from a 1 V supply. A gain/P/sub dc/ figure of merit of 10 dB/mW is achieved, which to our knowledge is the highest ever reported at C-band.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122716557","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
A 3.2 V, 45% efficient, novel Class AB+C CDMA MMIC power amplifier using quasi enhancement mode PHEMTs 一种采用准增强模式PHEMTs的3.2 V, 45%效率的新型AB+C类CDMA MMIC功率放大器
J. Cao, X.W. Wang, C. Quek, R. Singh, H. Nakamura
{"title":"A 3.2 V, 45% efficient, novel Class AB+C CDMA MMIC power amplifier using quasi enhancement mode PHEMTs","authors":"J. Cao, X.W. Wang, C. Quek, R. Singh, H. Nakamura","doi":"10.1109/RFIC.2000.854424","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854424","url":null,"abstract":"This paper presents a novel power amplifier (PA) configuration (Class AB+C) which allows low quiescent current and thereby high PAE at low output power levels to be achieved without compromising high power linearity. The designed 800 MHz CDMA PA using quasi enhancement PHEMT process attained over 45% PAE, 0.8-watt output power and 33 dB gain at -43 dBc adjacent channel power rejection (ACPR), at a supply voltage of 3.2 V. The total quiescent current consumed is only 52 mA. In contrast, the conventional Class AB configuration required 82 mA to achieve similar performance.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123347492","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Monolithic GaAs-InGaP HBT balanced vector modulators for millimeter-wave wireless systems 用于毫米波无线系统的单片GaAs-InGaP HBT平衡矢量调制器
A. E. Ashtiani, T. Gokdemir, A. Vilches, Z. Hu, I. Robertson, S. Marsh
{"title":"Monolithic GaAs-InGaP HBT balanced vector modulators for millimeter-wave wireless systems","authors":"A. E. Ashtiani, T. Gokdemir, A. Vilches, Z. Hu, I. Robertson, S. Marsh","doi":"10.1109/RFIC.2000.854445","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854445","url":null,"abstract":"This paper describes the design and performance of millimeter-wave balanced vector modulators employing the Marconi HBT MMIC technology. Two versions have been fabricated for operation at 38 GHz; the first employs normal Lange couplers whilst the second employs miniaturised microstrip couplers, which reduce the MMIC chip area by more than 40%. With a simple bias calibration technique the circuits achieve near-perfect constellations with negligible amplitude and phase errors over a wide bandwidth.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115381208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
A low-IF polyphase receiver for GSM using log-domain signal processing 采用对数域信号处理的GSM低中频多相接收机
B. Minnis, P. Moore, A. Payne, A. C. Caswell, M. Barnard
{"title":"A low-IF polyphase receiver for GSM using log-domain signal processing","authors":"B. Minnis, P. Moore, A. Payne, A. C. Caswell, M. Barnard","doi":"10.1109/RFIC.2000.854422","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854422","url":null,"abstract":"The design of a polyphase receiver for GSM is presented. Compared with a superhet solution, it offers similar performance but is very much easier to integrate on silicon without the need for off-chip channel filters. Compared with a zero-IF solution, a substantial improvement in performance is achieved by virtue of eliminating the problems with DC offsets and IP/sub 2/ generation. The use of log-domain signal processing leads to simplifications in the digital baseband and eliminates the need for AGC.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115722109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
A new design approach for variable-gain low noise amplifiers 一种变增益低噪声放大器的新设计方法
S. Pennisi, S. Scaccianoce, G. Palmisano
{"title":"A new design approach for variable-gain low noise amplifiers","authors":"S. Pennisi, S. Scaccianoce, G. Palmisano","doi":"10.1109/RFIC.2000.854434","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854434","url":null,"abstract":"A new approach to the design of variable-gain low noise amplifiers is presented in which input and output signals can be switched among circuit branches with different features. It can be arranged for high linearity performance and/or different frequency shapes. Moreover, it allows matching conditions for multi-band applications to be met. As a design example, a 900 MHz three-gain level low noise amplifier was designed in a 20 GHz bipolar technology. The circuit exhibits a maximum gain and a noise figure of 26 dB and 2.1 dB, respectively and provides accurate input and output matching.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124800016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
A direct conversion transceiver for multi-band GSM application 用于多频段GSM应用的直接转换收发器
J. Strange, S. Atkinson
{"title":"A direct conversion transceiver for multi-band GSM application","authors":"J. Strange, S. Atkinson","doi":"10.1109/RFIC.2000.854409","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854409","url":null,"abstract":"The use of direct conversion receiver topologies has been marked by many technical problems, particularly when used in a TDMA environment. This paper describes a receiver architecture that overcomes many of the traditional problems associated with direct conversion. This architecture has been applied in the design of a GSM multi-band transceiver that also features a development of the offset PLL transmitter together with a fast locking fractional-N synthesizer.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131256818","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 44
An 18-21 GHz InP DHBT linear microwave Doherty amplifier 一种18-21 GHz InP DHBT线性微波多尔蒂放大器
K. Kobayashi, A. Oki, A. Gutierrez-Aitken, P. Chin, Li Yang, E. Kaneshiro, P. Grossman, K. Sato, T. Block, H. Yen, D. Streit
{"title":"An 18-21 GHz InP DHBT linear microwave Doherty amplifier","authors":"K. Kobayashi, A. Oki, A. Gutierrez-Aitken, P. Chin, Li Yang, E. Kaneshiro, P. Grossman, K. Sato, T. Block, H. Yen, D. Streit","doi":"10.1109/RFIC.2000.854443","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854443","url":null,"abstract":"This work describes the first demonstration of an InP DHBT MMIC Doherty amplifier at K-band. When combined with InP DHBTs, the Doherty amplifier achieves a record linear PAE of 20% under a strict C/IM3 linearity ratio of 30 dBc while producing a Pout of 20.1 dBm. This benchmarks 3 dB greater Pout and 4% higher linear PAE than achieved with a PHEMT MMIC Doherty amplifier at Ku-band for the same C/IM3 linearity. Compared to its own linear \"class A\" bias performance, the Doherty amplifier achieves an 11 dB improvement in C/IM3 for the same Pout and slightly greater efficiency. The superior linearity of the InP DHBT Doherty amplifier approach is attractive for satellite and MM-wave communication systems.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128404950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
A monolithic 2.8 V, 3.2 W silicon bipolar power amplifier with 54% PAE at 900 MHz 单片式 2.8 V、3.2 W 硅双极功率放大器,900 MHz 时 PAE 为 54
A. Heinz, W. Simburger, H. Wohlmuth, P. Weger, W. Wilhelm, R. Gabl, K. Aufinger
{"title":"A monolithic 2.8 V, 3.2 W silicon bipolar power amplifier with 54% PAE at 900 MHz","authors":"A. Heinz, W. Simburger, H. Wohlmuth, P. Weger, W. Wilhelm, R. Gabl, K. Aufinger","doi":"10.1109/RFIC.2000.854429","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854429","url":null,"abstract":"This work presents a balanced two-stage monolithic power amplifier in Si bipolar technology for 0.8-1 GHz. On-chip transformers are used as input-baluns as well as for interstage matching. A closed-loop bias circuit is introduced to diminish break-down effects and increase the maximum usable supply voltage. The chip is operating from 2.8 V to 4.5 V. At 2.8 V the output power is 3.2 W with a power-added efficiency of 54%. The maximum output power of 7.7 W with an efficiency of 57% is achieved at 4.5 V supply voltage. The small-signal gain is 38 dB.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127505784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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