2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)最新文献_第2页

Future mobile society beyond Moore's Law 超越摩尔定律的未来移动社会

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2013-12-23 DOI: 10.1109/ASSCC.2013.6690967

M. Je, T. Liow, H. Chang, S. Bhattacharya, D. Kwong

引用次数: 3

A rectifier for piezoelectric energy harvesting system with series Synchronized Switch Harvesting Inductor 具有串联同步开关收集电感的压电能量收集系统整流器

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2013-12-23 DOI: 10.1109/ASSCC.2013.6691034

Xuan-Dien Do, Huy-Hieu Nguyen, Seok-Kyun Han, Sang-Gug Lee

引用次数: 21

A time-domain smart temperature sensor without an explicit bandgap reference in SOI CMOS operating up to 225°C 一个时域智能温度传感器，没有明确的带隙参考，在SOI CMOS工作高达225°C

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2013-12-23 DOI: 10.1109/ASSCC.2013.6691010

J. Pathrose, L. Zou, K. Chai, M. Je, Y. Xu

引用次数: 6

10.3-Gb/s burst-mode CDR with idle insertion and digital calibration in 40-nm CMOS for 10G-EPON systems 10G-EPON系统的10.3 gb /s突发模式CDR，带空闲插入和40纳米CMOS数字校准

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2013-12-23 DOI: 10.1109/ASSCC.2013.6691055

Hiroaki Katsurai, M. Nogawa, Y. Ohtomo, J. Terada, H. Koizumi

引用次数: 3

The evolution of CMOS image sensors CMOS图像传感器的发展

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2013-12-23 DOI: 10.1109/ASSCC.2013.6690968

T. Hirayama

引用次数: 9

An 8Ω, 1.75W, 95% efficiency, 0.004% THD+N Class-D amplifier with a feed-forward ADC and feedback filters 一个8Ω， 1.75W, 95%效率，0.004% THD+N d类放大器，前馈ADC和反馈滤波器

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2013-12-23 DOI: 10.1109/ASSCC.2013.6691059

Xicheng Jiang, Jungwoo Song, D. Cheung, Minsheng Wang, S. Arunachalam

引用次数: 5

25 to 300 Degree celsius 80bps acoustic transmitter based on crystal-less temperature-independent frequency reference with differential modulation for drilling noise power cancellation 25至300摄氏度80bps声学发射机，基于无晶体温度无关频率参考，差分调制，用于钻井噪声功率消除

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2013-12-23 DOI: 10.1109/ASSCC.2013.6691080

Lianhong Zhou, L. Yao, C. Heng, Muthukumaraswamy Annamalai, M. Je, W. K. Han, Lakshmi Sutha Kumar, Y. Guan

引用次数: 1

An energy efficient fully integrated OOK transceiver SoC for wireless body area networks 一种节能的完全集成的OOK收发器SoC，用于无线体域网络

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2013-12-23 DOI: 10.1109/ASSCC.2013.6691077

Bo Zhao, Yinan Sun, Wei Zou, Y. Lian, Yongpan Liu, Huazhong Yang

{"title":"An energy efficient fully integrated OOK transceiver SoC for wireless body area networks","authors":"Bo Zhao, Yinan Sun, Wei Zou, Y. Lian, Yongpan Liu, Huazhong Yang","doi":"10.1109/ASSCC.2013.6691077","DOIUrl":"https://doi.org/10.1109/ASSCC.2013.6691077","url":null,"abstract":"This work presents a low-power high-speed system-on-chip (SoC) for wireless body area networks (WBANs). The SoC is fully integrated with a 10 Mb/s on-off keying (OOK) RF transceiver, digital processing units, an 8051 micro-controlled unit (MCU), a successive approximation (SAR) ADC, and etc. The receiver adopts envelop detector (ED) based structure to improve the energy efficiency. Conventional ED based structure has a poor sensitivity when reaching a bit rate of Mb/s level. To resolve the problem, we design a receiving (Rx) front-end with 77 dB gain at 10 Mb/s data rate, and propose a novel supply isolation scheme to avoid the instability induced by such a high gain. The transmitter is based on a 2 GHz digitally controlled oscillator (DCO), which uses bond wires as inductors to further reduce the power at transmitting (Tx) mode. The digital baseband is designed by a near-threshold design (NTD) method for low power consumption. The chip is implemented with 0.13 μm CMOS technology, measured results show that the receiver consumes 0.214 nJ/bit at -65 dBm sensitivity, and the Tx energy efficiency is 0.285 nJ/bit at an output power of -5.4 dBm. In addition, the digital baseband consumes 34.8 pJ/bit with its supply voltage lowered to 0.55 V, indicating its energy per bit is reduced to nearly 1/4 of the super-threshold operation.","PeriodicalId":296544,"journal":{"name":"2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127583414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

A CMOS 13.56-MHz high-efficiency low-dropout-voltage 40-mW inductive link power supply utilizing on-chip delay-compensated voltage doubler rectifier and multiple LDOs for implantable medical devices 一种采用片上延迟补偿倍压整流器和多个ldo的CMOS 13.56 mhz高效低压降40mw感应链路电源，用于植入式医疗设备

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2013-12-23 DOI: 10.1109/ASSCC.2013.6691031

Xin-Hong Qian, Ming-Seng Cheng, Chung-Yu Wu

{"title":"A CMOS 13.56-MHz high-efficiency low-dropout-voltage 40-mW inductive link power supply utilizing on-chip delay-compensated voltage doubler rectifier and multiple LDOs for implantable medical devices","authors":"Xin-Hong Qian, Ming-Seng Cheng, Chung-Yu Wu","doi":"10.1109/ASSCC.2013.6691031","DOIUrl":"https://doi.org/10.1109/ASSCC.2013.6691031","url":null,"abstract":"A near-field 13.56-MHz 20mA inductive energy transmission device with ferrite core spiral coils and CMOS power regulator is designed and tested. The power regulator is composed of active voltage doubler (VD) rectifier and low-dropout regulators (LDOs). In order to avoid large space requirement of coil and further increase its efficiency in the implantable medical devices (IMDs), the coils are constructed in the spiral shape with a ferrite core. In the VD with the comparator, the input offset voltage is adjustable for delay compensation and a start-up control circuit is added to achieve robust start-up mechanism. On-chip delay compensation control is implemented to prevent from reverse current conduction and increase the efficiency. Three fully-integrated LDOs with rectifier output voltage of 2V to 1.8V are realized: LDO for analog circuits (ALDO), LDO for digital circuits (DLDO) and LDO for reference-voltage circuits (RLDO). Thus the performance of individual LDO can be optimized. Both ALDO and RLDO have low crosstalk noise from DLDO. The measured ripple voltage of rectifier output is 10.4mV. The power conversion efficiency (PCE) of 85% with 20mA output current. The measured dropout voltage is 384mV. As compared with other designs, the proposed Inductive link power supply has lower ripple voltages and dropout voltage, and higher PCE.","PeriodicalId":296544,"journal":{"name":"2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"417 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133373785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

A resonant-mode switchable VCO with 47.6–71.0 GHz tuning range based on π-type LC network 基于π型LC网络的47.6 ~ 71.0 GHz调谐范围的谐振模式可切换压控振荡器

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2013-12-23 DOI: 10.1109/ASSCC.2013.6691047

Haikun Jia, B. Chi, Lixue Kuang, Zhihua Wang

引用次数: 3