2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)最新文献

A Low-Power Approximate Multiply-Add Unit 一种低功耗近似乘加单元

2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2019-03-06 DOI: 10.1109/ISDCS.2019.8719087

Tongxin Yang, Toshinori Sato, Tomoaki Ukezono

引用次数: 2

A CMOS Integrated Sweat Monitoring System for Medical Applications 一种医疗用CMOS集成汗液监测系统

2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2019-03-01 DOI: 10.1109/ISDCS.2019.8719102

Tera Sakata, Yu Mitani, K. Miyaji, Satoshi Kaneko, Takaharu Uekura, Hidetoshi Taki, Hideya Momose, K. Johguchi

引用次数: 1

Validation on Duality in Impact-ionization Carrier Generation at the Onset of Snapback in Power MOSFETs 功率mosfet中冲击电离载流子产生的对偶性验证

2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2019-03-01 DOI: 10.1109/ISDCS.2019.8719088

T. Iizuka, Hiroyuki Hashigami, M. Miura-Mattausch, H. Mattausch

引用次数: 1

Optimization of DC-DC Power Converter Design with Second Generation HiSIM_HV Model 基于第二代HiSIM_HV模型的DC-DC功率变换器优化设计

2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2019-03-01 DOI: 10.1109/ISDCS.2019.8719275

Soumajit Ghosh, V. Roshan, Avishek Dutta, Subhajit Das, T. Maiti, M. Miura-Mattausch, H. Rahaman

引用次数: 0

Comparative Stability Analysis of Pristine and AsF5 Intercalation Doped Top Contact Graphene Nano Ribbon Interconnects 原始和AsF5掺杂顶部接触石墨烯纳米带互连的稳定性比较分析

2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2019-03-01 DOI: 10.1109/ISDCS.2019.8719094

Subhajit Das, S. Bhattacharya, Debaprasad Das, H. Rahaman

引用次数: 1

An IoT-gateway with the information-centric communication 以信息为中心的物联网网关

2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2019-03-01 DOI: 10.1109/ISDCS.2019.8719265

K. Inoue, Nozomi Kobori, Atsushi Hirota, T. Koide, Takumi Okamoto

引用次数: 0

Development of Silicon Photonics Integrated Circuits for Next Generation Optical Access Networks 下一代光接入网用硅光子集成电路的研制

2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2019-03-01 DOI: 10.1109/ISDCS.2019.8719259

H. Sasaki

{"title":"Development of Silicon Photonics Integrated Circuits for Next Generation Optical Access Networks","authors":"H. Sasaki","doi":"10.1109/ISDCS.2019.8719259","DOIUrl":"https://doi.org/10.1109/ISDCS.2019.8719259","url":null,"abstract":"Various types of data streams such as ultra-high-definition videos and the fifth generation mobile services may require both flexible network management and large capacity of transmission for the optical access networks. Time and Wavelength Division Multiplexing-Passive Optical Network (TWDM-PON) is regarded as a promising candidate for such applications realizing the aggregated bandwidth of 40 Gbps with four wavelength multiplexed 10 Gbps optical signals. Silicon (Si) photonics technology is critical to implement such bi-directional WDM optical transmission functions into a single ultra-compact photonic integrated circuit (PIC) at relatively low cost. The current status of the Si PIC development is reported. The PIC consists of following functional devices; a spot-size convertor for the efficient coupling between a Si waveguide and a single-mode optical fiber, the first WDM filter to separate bi-directional optical signals into up and down-stream signals, the second WDM filter for 100 GHz-wavelength separation, an array of avalanche photodiodes (APDs) for down-stream signal detection, and a modulator to modulate up-stream signals. A semiconductor laser diode die is surface mounted on the PIC. The detail of both device design and experimental results are discussed.","PeriodicalId":293660,"journal":{"name":"2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126184055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

An Integrated CO2 Sensor Using TiO2NT/RGO Hybrid Sensing Layer with embedded Micro hot Plate 嵌入式微热板TiO2NT/RGO混合传感层集成CO2传感器

2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2019-03-01 DOI: 10.1109/ISDCS.2019.8719249

S. Ghosal, I. Maity, P. Bhattacharyya

{"title":"An Integrated CO2 Sensor Using TiO2NT/RGO Hybrid Sensing Layer with embedded Micro hot Plate","authors":"S. Ghosal, I. Maity, P. Bhattacharyya","doi":"10.1109/ISDCS.2019.8719249","DOIUrl":"https://doi.org/10.1109/ISDCS.2019.8719249","url":null,"abstract":"In the present work, the comparison of the hybrid structure (TiO2NT/RGO: TiO2 nanotube (TiO2NT) and Reduced Graphene Oxide (RGO)), along with its pristine counterpart (TiO2NT) based device, related to its fabrication, characterization and oxidizing vapor sensing potentiality integrated with Micro-heater, is reported. On top of the microheater, the deposited sputtered metal is Titanium (Ti) and Platinum (Pt) with the thickness of 10 nm / 80 nm. The calculated Temperature Coefficient of Resistance (TCR) of the sensor is 0.001690 and it’s determined by the measuring of resistance. The temperature of heater is selected in between of $25^{circ}mathrm{C}-250^{circ}mathrm{C}$. TiO2 nanotubes were fabricated through anodization method and the nanotubes were covered via the RGO layer in an unequal manner. After the detailed study, the vapor sensing performance of the pristine structure along with its hybrid counterpart were tested for the detection of different oxidizing vapor like CO2 and NO. The hybrid sensor showed $sim$35%, $sim$58.14%, and $sim$66.06% response magnitude for 5 ppm, 10 ppm, and 50 ppm of CO2 vapor concentrations, with the optimum temperature of $60^{circ}mathrm{lt pgt C}$ respectively, whereas for the pristine (the nanotube sensor) structure the nanotube sensor offered the response magnitude of $sim$21.08%, $sim$33.25% and $sim$51.76% respectively, at its optimum temperature of $135^{circ}mathrm{C}$. After doing the comprehensive illustration between the pristine structure and the hybrid structure, a detailed discussion has been presented correlating different sensing parameters like response magnitude, response time and recovery time.","PeriodicalId":293660,"journal":{"name":"2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125741518","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Development of In-situ Monitoring System for Crop Growth Observation 作物生长观测现场监测系统的研制

2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2019-03-01 DOI: 10.1109/ISDCS.2019.8719263

H. Murakami, Yoshiki Tanaka, Junichi Yamashita, Rikako Takeshita, Yasunori Sakane, Takumi Okamoto, T. Koide

引用次数: 0

A Novel Step-shaped Gate Tunnel FET with Low Ambipolar Current 一种新型低双极电流阶梯栅隧道场效应管

2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2019-03-01 DOI: 10.1109/ISDCS.2019.8719250

Mingjun Liu, Qian Xie, Shuang Xia, Z. Wang

{"title":"A Novel Step-shaped Gate Tunnel FET with Low Ambipolar Current","authors":"Mingjun Liu, Qian Xie, Shuang Xia, Z. Wang","doi":"10.1109/ISDCS.2019.8719250","DOIUrl":"https://doi.org/10.1109/ISDCS.2019.8719250","url":null,"abstract":"In this paper, a novel TFET architecture named the step-shaped gate TFET (SSG-TFET) has been proposed for the suppression of the ambipolar current. By adjusting the energy band, the SSG-TFET can evidently reduce the ambipolar current. We compare the proposed SSG-TFET with the conventional DGTFET, gate overlap on drain TFET (OGTFET) and gate underlap TFET (SG-TFET) by using TCAD tool Sentaurus and found that the SSG-TFET can evidently suppress the ambipolar current. To be specific, the ambipolar current of the SSG-TFET decreases 7 orders of magnitude from 10$^{-9} {A}/mu$m for conventional TFET to 10$^{-16}{A}/mu$m atVgs = -1.5 V. For the proposed SSG-TFET, we have found that there exists an optimal right gate dielectric thickness toxdb with minimum ambipolar current of SSG-TFET. Moreover, we investigate the influence of the Si body thickness tsi, the length of the oxide layer exceeds the interface of channel and the drain on the optimal thickness of the right gate dielectric of the SSG-TFET. The simulation results show that the optimal oxide layer thickness toxdb decreases with the increase of $t_{s}$, and toxdb increases with the increase length of Lun and Lov, but when Lov $gt 40$ nm, toxdb remains the same. The proposed SSG-TFET with low ambipolar current can be used for the ultra-low power integrated circuit applications.","PeriodicalId":293660,"journal":{"name":"2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"352 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115163810","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9