{"title":"一种新型低双极电流阶梯栅隧道场效应管","authors":"Mingjun Liu, Qian Xie, Shuang Xia, Z. Wang","doi":"10.1109/ISDCS.2019.8719250","DOIUrl":null,"url":null,"abstract":"In this paper, a novel TFET architecture named the step-shaped gate TFET (SSG-TFET) has been proposed for the suppression of the ambipolar current. By adjusting the energy band, the SSG-TFET can evidently reduce the ambipolar current. We compare the proposed SSG-TFET with the conventional DGTFET, gate overlap on drain TFET (OGTFET) and gate underlap TFET (SG-TFET) by using TCAD tool Sentaurus and found that the SSG-TFET can evidently suppress the ambipolar current. To be specific, the ambipolar current of the SSG-TFET decreases 7 orders of magnitude from 10$^{-9} {A}/\\mu$m for conventional TFET to 10$^{-16}{A}/\\mu$m atVgs = -1.5 V. For the proposed SSG-TFET, we have found that there exists an optimal right gate dielectric thickness toxdb with minimum ambipolar current of SSG-TFET. Moreover, we investigate the influence of the Si body thickness tsi, the length of the oxide layer exceeds the interface of channel and the drain on the optimal thickness of the right gate dielectric of the SSG-TFET. The simulation results show that the optimal oxide layer thickness toxdb decreases with the increase of $t_{s}$, and toxdb increases with the increase length of Lun and Lov, but when Lov $\\gt 40$ nm, toxdb remains the same. The proposed SSG-TFET with low ambipolar current can be used for the ultra-low power integrated circuit applications.","PeriodicalId":293660,"journal":{"name":"2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"352 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A Novel Step-shaped Gate Tunnel FET with Low Ambipolar Current\",\"authors\":\"Mingjun Liu, Qian Xie, Shuang Xia, Z. Wang\",\"doi\":\"10.1109/ISDCS.2019.8719250\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a novel TFET architecture named the step-shaped gate TFET (SSG-TFET) has been proposed for the suppression of the ambipolar current. By adjusting the energy band, the SSG-TFET can evidently reduce the ambipolar current. We compare the proposed SSG-TFET with the conventional DGTFET, gate overlap on drain TFET (OGTFET) and gate underlap TFET (SG-TFET) by using TCAD tool Sentaurus and found that the SSG-TFET can evidently suppress the ambipolar current. To be specific, the ambipolar current of the SSG-TFET decreases 7 orders of magnitude from 10$^{-9} {A}/\\\\mu$m for conventional TFET to 10$^{-16}{A}/\\\\mu$m atVgs = -1.5 V. For the proposed SSG-TFET, we have found that there exists an optimal right gate dielectric thickness toxdb with minimum ambipolar current of SSG-TFET. Moreover, we investigate the influence of the Si body thickness tsi, the length of the oxide layer exceeds the interface of channel and the drain on the optimal thickness of the right gate dielectric of the SSG-TFET. The simulation results show that the optimal oxide layer thickness toxdb decreases with the increase of $t_{s}$, and toxdb increases with the increase length of Lun and Lov, but when Lov $\\\\gt 40$ nm, toxdb remains the same. The proposed SSG-TFET with low ambipolar current can be used for the ultra-low power integrated circuit applications.\",\"PeriodicalId\":293660,\"journal\":{\"name\":\"2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)\",\"volume\":\"352 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISDCS.2019.8719250\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISDCS.2019.8719250","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Novel Step-shaped Gate Tunnel FET with Low Ambipolar Current
In this paper, a novel TFET architecture named the step-shaped gate TFET (SSG-TFET) has been proposed for the suppression of the ambipolar current. By adjusting the energy band, the SSG-TFET can evidently reduce the ambipolar current. We compare the proposed SSG-TFET with the conventional DGTFET, gate overlap on drain TFET (OGTFET) and gate underlap TFET (SG-TFET) by using TCAD tool Sentaurus and found that the SSG-TFET can evidently suppress the ambipolar current. To be specific, the ambipolar current of the SSG-TFET decreases 7 orders of magnitude from 10$^{-9} {A}/\mu$m for conventional TFET to 10$^{-16}{A}/\mu$m atVgs = -1.5 V. For the proposed SSG-TFET, we have found that there exists an optimal right gate dielectric thickness toxdb with minimum ambipolar current of SSG-TFET. Moreover, we investigate the influence of the Si body thickness tsi, the length of the oxide layer exceeds the interface of channel and the drain on the optimal thickness of the right gate dielectric of the SSG-TFET. The simulation results show that the optimal oxide layer thickness toxdb decreases with the increase of $t_{s}$, and toxdb increases with the increase length of Lun and Lov, but when Lov $\gt 40$ nm, toxdb remains the same. The proposed SSG-TFET with low ambipolar current can be used for the ultra-low power integrated circuit applications.