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1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers最新文献

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A wideband monolithic GaAs IC amplifier 宽带单片砷化镓集成电路放大器
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156302
D. Estreich
{"title":"A wideband monolithic GaAs IC amplifier","authors":"D. Estreich","doi":"10.1109/ISSCC.1982.1156302","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156302","url":null,"abstract":"A monolithic GaAs IC wideband amplifier with a 26dB voltage gain and bandwidth of 5MHz- 3GHz, on a<tex>650μ × 420μ</tex>chip, will be described.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127669913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A 16b microprocessor with 152b wide microcontrol word 具有152b宽微控制字的16b微处理器
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156407
K. Guttag, J. Sexton, Ki Chang
{"title":"A 16b microprocessor with 152b wide microcontrol word","authors":"K. Guttag, J. Sexton, Ki Chang","doi":"10.1109/ISSCC.1982.1156407","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156407","url":null,"abstract":"A data reduction method-compressed control ROM, yielding a 4 to 1 bit reduction, affording a 152b control word, will be described. The horizontal control produces better throughput by allowing simultaneous micro operations.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128069985","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
GaAs logic for multi-Gb data generators 用于多gb数据生成器的GaAs逻辑
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156299
C. Liechti, G. Baldwin, E. Gowen, R. Joly, M. Namjoo, A. Podell
{"title":"GaAs logic for multi-Gb data generators","authors":"C. Liechti, G. Baldwin, E. Gowen, R. Joly, M. Namjoo, A. Podell","doi":"10.1109/ISSCC.1982.1156299","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156299","url":null,"abstract":"Three GaAs MSICs, consisting of a 1023b PRBS generator, recurrence-relationship test circuit and a multiple-8b word generator will be described. The PRBS circuits generate and detect a maximum-length sequence at 2.5Gb rates. The word generator forms groups of 8b words, whose content and number can be dynamically controlled at 5Gb.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"152 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120872048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Alpha-particle-induced soft error rate modeling α粒子诱导的软错误率模型
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156354
G. Sai-Halasz
{"title":"Alpha-particle-induced soft error rate modeling","authors":"G. Sai-Halasz","doi":"10.1109/ISSCC.1982.1156354","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156354","url":null,"abstract":"Monte Carlo procedures have been developed to obtain soft error rates (SER). The SER for a 1μm groundrule DRAM, due to alphas enamating from processing materials, shows the prevalence of multiple errors. SER reducing methods, using epi-layers, buried implant layers and Hi-C structures have been evaluated and found to be marginally effective.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121290310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A 288Kb dynamic RAM 288Kb动态RAM
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156390
B. Fitzgerald, E. Thoma
{"title":"A 288Kb dynamic RAM","authors":"B. Fitzgerald, E. Thoma","doi":"10.1109/ISSCC.1982.1156390","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156390","url":null,"abstract":"A 288Kb random access memory, organized as 32K bytes (9b per byte) with one byte being accessed during every read or write cycle, will be discussed. The chip can be fabricated using current silicon and aluminum metal-oxide-semiconductor technology, applying 2μ ground rules and 1.0μ overlay tolerances.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131671150","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A CMOS LSI 16×16 multiplier/multiplier-accumulator CMOS LSI 16&#215;16乘法器/乘法器-累加器
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156290
J. Anderson, B. Troutman, R. Allen
{"title":"A CMOS LSI 16&#215;16 multiplier/multiplier-accumulator","authors":"J. Anderson, B. Troutman, R. Allen","doi":"10.1109/ISSCC.1982.1156290","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156290","url":null,"abstract":"Two 2μ CMOS LSI chips with multiply times less than 100ns, and dissipation of 150mW, will be discussed. The use of Booth's algorithm speeds the multiplication process since the multiplier word is essentially recoded into 8 digits.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125690873","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A universal trigonometric function generator 一个通用的三角函数生成器
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156383
B. Gilbert
{"title":"A universal trigonometric function generator","authors":"B. Gilbert","doi":"10.1109/ISSCC.1982.1156383","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156383","url":null,"abstract":"A synthesis principle applied to a monolithic circuit capable of generating trigonometric functions (sine, cosine, tangent, cosecant, secant and cotangent, plus arctangent) will be Presented. Analog inputs represent angle and amplitude. Law conformance is as close as ∓ 0.02%.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123475331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
VHSIC technology approaches VHSIC技术方法
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156307
H. Borkan
{"title":"VHSIC technology approaches","authors":"H. Borkan","doi":"10.1109/ISSCC.1982.1156307","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156307","url":null,"abstract":"Tri-service contracts, totaling over $165M for the current three-year effort, have been granted to six companies to develop Very High Speed ICs required for signal processors to be used in advanced military systems. Each contractor has specified a different technology to achieve the near-term objectives of1 frac{1}/{4}μm minimum feature size and5 × 10^{11}gate-Hz/cm2functional throughput rate, and longer-term objectives of 0.5 and 1013, respectively ... Panelists will discuss the various technologies selected to meet the program objectives.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126666076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Packaging technology for microwave ICs and high speed logic 微波集成电路和高速逻辑的封装技术
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156381
L. Nevin
{"title":"Packaging technology for microwave ICs and high speed logic","authors":"L. Nevin","doi":"10.1109/ISSCC.1982.1156381","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156381","url":null,"abstract":"The problems of packaging for high-speed logic and microwave ICs have much in common. The issues of circuit partitioning, propagation delay, circuit density, power dissipation, testing and service are as appropriate to microwaves as to high performance computers . . . The number of technical approaches to these problems has grown with the evolution of semiconductor and packaging technologies . . . This panel will review the latest developments in the field from a variety of industries and seek common ground among these. Focus will be on realizable systems of today, plus a view to emerging technology.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128155431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Logic-in-memory VLSI for mainframe computers 用于大型计算机的内存逻辑VLSI
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156283
M. Odaka, M. Iwabuchi, K. Ogiue, G. Kitsukawa, K. Yamaguchi, M. Inadachi
{"title":"Logic-in-memory VLSI for mainframe computers","authors":"M. Odaka, M. Iwabuchi, K. Ogiue, G. Kitsukawa, K. Yamaguchi, M. Inadachi","doi":"10.1109/ISSCC.1982.1156283","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156283","url":null,"abstract":"A bipolar 6Kb memory VLSI with 770 logic gates developed for virtual address translation and buffer storage control will be described. Access time and power dissipation are 6.7ns and 5.2W.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124789246","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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