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Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming最新文献

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Experiences using adaptive concurrency in transactional memory with Lee's routing algorithm 利用Lee的路由算法在事务性内存中使用自适应并发的经验
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming Pub Date : 2008-02-20 DOI: 10.1145/1345206.1345246
Mohammad Ansari, Christos Kotselidis, Kim Jarvis, M. Luján, C. Kirkham, I. Watson
{"title":"Experiences using adaptive concurrency in transactional memory with Lee's routing algorithm","authors":"Mohammad Ansari, Christos Kotselidis, Kim Jarvis, M. Luján, C. Kirkham, I. Watson","doi":"10.1145/1345206.1345246","DOIUrl":"https://doi.org/10.1145/1345206.1345246","url":null,"abstract":"Experience in profiling Lee's routing algorithm, a new complex TM application, showed that transactional applications may exhibit dynamic exploitable parallelism, i.e. the amount of useful parallelism available at any point in time varies during the execution of the application. Obviously, executing too many transactions at times when the available parallelism is low will lead to high contention and wasted computation in aborted transactions, and vice versa. Current Transactional Memory (TM) implementations do not account for this behavior. This work employs adaptive concurrency to dynamically adjust the number of threads executing transactions concurrently. Our preliminary evaluation is performed in DSTM2 using Lee's routing algorithm, both of which were simple to modify to enable adaptive concurrency, and shows significant reduction in resource usage, and modest performance gains.","PeriodicalId":290559,"journal":{"name":"Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125017810","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
FastForward for efficient pipeline parallelism: a cache-optimized concurrent lock-free queue 用于高效管道并行的FastForward:一个缓存优化的并发无锁队列
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming Pub Date : 2008-02-20 DOI: 10.1145/1345206.1345215
John Giacomoni, Tipp Moseley, Manish Vachharajani
{"title":"FastForward for efficient pipeline parallelism: a cache-optimized concurrent lock-free queue","authors":"John Giacomoni, Tipp Moseley, Manish Vachharajani","doi":"10.1145/1345206.1345215","DOIUrl":"https://doi.org/10.1145/1345206.1345215","url":null,"abstract":"Low overhead core-to-core communication is critical for efficient pipeline-parallel software applications. This paper presents FastForward, a cache-optimized single-producer/single-consumer concurrent lock-free queue for pipeline parallelism on multicore architectures, with weak to strongly ordered consistency models. Enqueue and dequeue times on a 2.66 GHz Opteron 2218 based system are as low as 28.5 ns, up to 5x faster than the next best solution. FastForward's effectiveness is demonstrated for real applications by applying it to line-rate soft network processing on Gigabit Ethernet with general purpose commodity hardware.","PeriodicalId":290559,"journal":{"name":"Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123793634","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 172
Session details: Formal aspects of transactions & speculation 会议细节:交易和投机的正式方面
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming Pub Date : 2008-02-20 DOI: 10.1145/3255512
P. Tsigas
{"title":"Session details: Formal aspects of transactions & speculation","authors":"P. Tsigas","doi":"10.1145/3255512","DOIUrl":"https://doi.org/10.1145/3255512","url":null,"abstract":"","PeriodicalId":290559,"journal":{"name":"Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122765336","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Software transactional memory for large scale clusters 用于大规模集群的软件事务性内存
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming Pub Date : 2008-02-20 DOI: 10.1145/1345206.1345242
R. Bocchino, Vikram S. Adve, B. Chamberlain
{"title":"Software transactional memory for large scale clusters","authors":"R. Bocchino, Vikram S. Adve, B. Chamberlain","doi":"10.1145/1345206.1345242","DOIUrl":"https://doi.org/10.1145/1345206.1345242","url":null,"abstract":"While there has been extensive work on the design of software transactional memory (STM) for cache coherent shared memory systems, there has been no work on the design of an STM system for very large scale platforms containing potentially thousands of nodes. In this work, we present Cluster-STM, an STM designed for high performance on large-scale commodity clusters. Our design addresses several novel issues posed by this domain, including aggregating communication, managing locality, and distributing transactional metadata onto the nodes. We also re-evaluate several STM design choices previously studied for cache-coherent machines and conclude that, in some cases, different choices are appropriate on clusters. Finally, we show that our design scales well up to 512 processors. This is because on a cluster, the main barrier to STM scalability is the remote communication overhead imposed by the STM operations, and our design aggregates most of that communication with the communication of the underlying data.","PeriodicalId":290559,"journal":{"name":"Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133826627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 163
Cache-aware iteration space partitioning 缓存感知迭代空间分区
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming Pub Date : 2008-02-20 DOI: 10.1145/1345206.1345250
A. Kejariwal, A. Nicolau, U. Banerjee, A. Veidenbaum, C. Polychronopoulos
{"title":"Cache-aware iteration space partitioning","authors":"A. Kejariwal, A. Nicolau, U. Banerjee, A. Veidenbaum, C. Polychronopoulos","doi":"10.1145/1345206.1345250","DOIUrl":"https://doi.org/10.1145/1345206.1345250","url":null,"abstract":"The need for high performance per watt has led to the development of multi-core systems such as the Intel Core 2 Duo processor and the Intel quad-core Kentsfield processor. Maximal exploitation of the hardware parallelism supported by such systems necessitates the development of concurrent software. This, in part, entails program parallelization and efficient mapping of the parallelized program onto the different cores. The latter affects the load balance between the different cores which in turn has a direct impact on performance. In light of the fact that parallel loops, such as a parallel DO loop in Fortran, account for a large percentage of the total execution time, we focus on the problem of how to efficiently partition the iteration space of (possibly) nested perfect/non-perfect parallel loops. In this regard, one of the key aspects is how to efficiently capture the cache behavior as the cache subsystem is often the main performance bottleneck in multi-core systems. In this paper, we present a novel profile-guided compiler technique for cache-aware partitioning of iteration spaces of parallel loops. We present a case study using a kernel from the industry-standard SPEC CPU benchmark suite.","PeriodicalId":290559,"journal":{"name":"Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114440581","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Session details: Static analysis 会话详细信息:静态分析
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming Pub Date : 2008-02-20 DOI: 10.1145/3255505
M. Shapiro
{"title":"Session details: Static analysis","authors":"M. Shapiro","doi":"10.1145/3255505","DOIUrl":"https://doi.org/10.1145/3255505","url":null,"abstract":"","PeriodicalId":290559,"journal":{"name":"Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117064710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Quasi-static scheduling for safe futures 安全期货的准静态调度
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming Pub Date : 2008-02-20 DOI: 10.1145/1345206.1345212
Armand Navabi, X. Zhang, S. Jagannathan
{"title":"Quasi-static scheduling for safe futures","authors":"Armand Navabi, X. Zhang, S. Jagannathan","doi":"10.1145/1345206.1345212","DOIUrl":"https://doi.org/10.1145/1345206.1345212","url":null,"abstract":"Migrating sequential programs to effectively utilize next generation multicore architectures is a key challenge facing application developers and implementors. Languages like Java that support complex control- and dataflow abstractions confound classical automatic parallelization techniques. On the other hand, introducing multithreading and concurrency control explicitly into programs can impose a high conceptual burden on the programmer, and may entail a significant rewrite of the original program. In this paper, we consider a new technique to address this issue. Our approach makes use of futures, a simple annotation that introduces asynchronous concurrency into Java programs, but provides no concurrency control. To ensure concurrent execution does not yield behavior inconsistent with sequential execution (i.e., execution yielded by erasing all futures), we present a new interprocedural summary-based dataflow analysis. The analysis inserts lightweight barriers that block and resume threads executing futures if a dependency violation may ensue. There are no constraints on how threads execute other than those imposed by these barriers. Our experimental results indicate futures can be leveraged to transparently ensure safety and profitably exploit parallelism; in contrast to earlier efforts, our technique is completely portable, and requires no modifications to the underlying JVM.","PeriodicalId":290559,"journal":{"name":"Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126148340","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 34
Session details: Matrix product for special platforms 会议详情:特殊平台的矩阵产品
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming Pub Date : 2008-02-20 DOI: 10.1145/3255507
J. Vetter
{"title":"Session details: Matrix product for special platforms","authors":"J. Vetter","doi":"10.1145/3255507","DOIUrl":"https://doi.org/10.1145/3255507","url":null,"abstract":"","PeriodicalId":290559,"journal":{"name":"Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124761878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
All-window profiling of concurrent executions 并发执行的全窗口分析
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming Pub Date : 2008-02-20 DOI: 10.1145/1345206.1345248
C. Ding, Trishul M. Chilimbi
{"title":"All-window profiling of concurrent executions","authors":"C. Ding, Trishul M. Chilimbi","doi":"10.1145/1345206.1345248","DOIUrl":"https://doi.org/10.1145/1345206.1345248","url":null,"abstract":"This paper first demonstrates the need for all-window profiling in a concurrent execution, then presents an approximate algorithm, and finally discusses related work.","PeriodicalId":290559,"journal":{"name":"Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming","volume":"96 11","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113940320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Session details: GPUs and SIMD 会话详细信息:gpu和SIMD
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming Pub Date : 2008-02-20 DOI: 10.1145/3255508
T. Harris
{"title":"Session details: GPUs and SIMD","authors":"T. Harris","doi":"10.1145/3255508","DOIUrl":"https://doi.org/10.1145/3255508","url":null,"abstract":"","PeriodicalId":290559,"journal":{"name":"Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124975764","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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