2009 Fourth International Conference on Embedded and Multimedia Computing最新文献

{"title":"Implicit Data Permutation for SIMD Devices","authors":"Li Shen, Libo Huang, Nong Xiao, Zhiying Wang","doi":"10.1109/EM-COM.2009.5403000","DOIUrl":"https://doi.org/10.1109/EM-COM.2009.5403000","url":null,"abstract":"SIMD extension is one of the most effective ways to exploit data level parallelism in current microprocessor design. But limited by some constraints, such as memory address alignment and inconsecutive memory access, data permutation operations are usually needed before SIMD calculations, which impede us to exploit more parallelism. In this paper, an implicit data permutation mechanism is proposed. With our approach, original explicit data permutation can be split into two stages: explicit pattern setting and implicit data reorganization. The first stage is performed by scalar instructions and the second one is triggered implicitly when a vector register is read. It provides new chance for further optimization. To make this mechanism programmable, several new scalar instructions are extended and corresponding compilation strategies are also proposed. Exper- imental results show that oriented to multimedia benchmarks, 1.18x speedup can be achieved over current SIMD optimization techniques on average.","PeriodicalId":290107,"journal":{"name":"2009 Fourth International Conference on Embedded and Multimedia Computing","volume":"213 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121721971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Hierarchical Loop Partitioning For Rapid Generation of Runtime Configurations","authors":"S. Lam, Yun Deng, Jian Hu, Xilong Zhou, T. Srikanthan","doi":"10.1007/978-3-642-12133-3_26","DOIUrl":"https://doi.org/10.1007/978-3-642-12133-3_26","url":null,"abstract":"","PeriodicalId":290107,"journal":{"name":"2009 Fourth International Conference on Embedded and Multimedia Computing","volume":"1 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132223853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Smartcard-Based Secret Sharing for Secure Fingerprint Verification","authors":"Hanna Choi, W. Choi, Daesung Moon, Sungju Lee, Yongwha Chung, S. Pan","doi":"10.1109/EM-COM.2009.5402990","DOIUrl":"https://doi.org/10.1109/EM-COM.2009.5402990","url":null,"abstract":"Recently, in the smartcard-based authentication system, there is an increasing trend of using fingerprint for the card holder verification, instead of passwords. However, the security of the fingerprint data is particularly important as the possible compromise of the data will be permanent. To protect the fingerprint data, techniques such as “fuzzy vault” which is based on the difficulty of the polynomial reconstruction need to be developed for the smartcard-based environment. In this paper, we propose a secure and efficient approach which reconstructs a polynomial on a smartcard with the aid of a server by using fuzzy fingerprint vault distributed into the smartcard and the server. Based on the experimental results, we confirmed that our secret sharingbased approach can perform the fuzzy vault-based fingerprint verification more securely(by a factor of 300) and quickly(by a factor of 17) on a combination of a smartcard and a server.","PeriodicalId":290107,"journal":{"name":"2009 Fourth International Conference on Embedded and Multimedia Computing","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132247756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"On the Handling Node Failure: Energy-Efficient Job Allocation Algorithm for Real-Time Sensor Networks","authors":"H. Karimi, M. Kargahi, N. Yazdani","doi":"10.3745/JIPS.2010.6.3.413","DOIUrl":"https://doi.org/10.3745/JIPS.2010.6.3.413","url":null,"abstract":"Wireless sensor networks are usually characterized by dense deployment of energy constrained nodes. Due to the usage of a large number of sensor nodes in uncontrolled hostile or harsh environments, node failure is a common event in these systems. Another common reason for node failure is the exhaustion of their energy resources and node inactivation. Such failures can have adverse effects on the quality of the real-time services in Wireless Sensor Networks (WSNs). To avoid such degradations, it is necessary that the failures be recovered in a proper manner to sustain network operation. In this paper we present a dynamic Energy efficient Real-Time Job Allocation (ERTJA) algorithm for handling node failures in a cluster of sensor nodes with the consideration of communication energy and time overheads besides the nodes' characteristics. ERTJA relies on the computation power of cluster members for handling a node failure. It also tries to minimize the energy consumption of the cluster by minimum activation of the sleeping nodes. The resulting system can then guarantee the Quality of Service (QoS) of the cluster application. Further, when the number of sleeping nodes is limited, the proposed algorithm uses the idle times of the active nodes to engage a graceful QoS degradation in the cluster. Simulation results show significant performance improvements of ERTJA in terms of the energy conservation and the probability of meeting deadlines compared with the other studied algorithms.","PeriodicalId":290107,"journal":{"name":"2009 Fourth International Conference on Embedded and Multimedia Computing","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129995561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Web-Based Visualization of Atmospheric Nucleation Processes for Mobile Embedded Clients","authors":"Shanrui Liu, Lihong Shang, Yu-yong Zhou, Jinzhu Gao, Rui Ding, Yi Liu","doi":"10.1109/EM-COM.2009.5402972","DOIUrl":"https://doi.org/10.1109/EM-COM.2009.5402972","url":null,"abstract":"With the development of science, remote data visualization is playing an increasingly important role. Meanwhile working on the road is becoming the life style of modern society. However, handicapped by the limits of the mobile embedded device and mass data to be visualized, the remote data visualization for mobile clients is still a big challenge. In this paper, we enhance our previously developed web-based tool to support mobile collaborative research of atmospheric nucleation processes. The paper shows how data mining, data compression, rendering acceleration and other techniques are used to overcome the limitations of network transfer, computation capability and cache capacity.","PeriodicalId":290107,"journal":{"name":"2009 Fourth International Conference on Embedded and Multimedia Computing","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132583222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Network Victim Cache: Leveraging Network-on-Chip for Managing Shared Caches in Chip Multiprocessors","authors":"Jinglei Wang, Y. Xue, Haixia Wang, Dongsheng Wang","doi":"10.1109/EM-COM.2009.5402983","DOIUrl":"https://doi.org/10.1109/EM-COM.2009.5402983","url":null,"abstract":"The large working sets of commercial and scientific workloads favor a shared L2 cache design that maximizes the aggregate cache capacity and minimizes off-chip memory requests in Chip Multiprocessors (CMP). There are two important hurdles that restrict the scalability of these chip multiprocessors: the on-chip memory cost of directory and the long L1 miss latencies. This work presents a network victim cache architecture aimed at facing these two important problems. Our proposal takes advantage of on-chip networks to manage shared caches in chip multiprocessors. The network victim cache architecture removes the directory structure from shared L2 caches and stores directory information for the blocks recently cached by L1 caches in the network interface components decreasing on-chip directory memory overhead and improves the scalability. The saved memory space is used as victim caches which are embedded into the network interface components to reduce L1 miss latencies further. The proposed architecture is evaluated based on simulations of a 16-core tiled CMP. Results demonstrate that the network victim cache architecture provides better scalability and improves performance by 23% on average against over the traditional CMP with shared L2 cache design, and up to 34% at best.","PeriodicalId":290107,"journal":{"name":"2009 Fourth International Conference on Embedded and Multimedia Computing","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124649241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Time Tree for Scheduling and Topology Control in Wireless Sensor Networks","authors":"Kilhung Lee","doi":"10.1109/EM-COM.2009.5402982","DOIUrl":"https://doi.org/10.1109/EM-COM.2009.5402982","url":null,"abstract":"This paper presents a scheduling and topology control scheme for wireless sensor networks. It uses time trees for sending data from the sensor node to the base station. For an energy efficient operation of the sensor networks in a distributed manner, time trees are built in order to reduce the collision probability and to minimize the total energy required to send data to the base station. A time tree is a data gathering tree where the base station is the root and each sensor node is either a relaying or a leaf node of the tree. Each tree operates in a different time schedule with possible different activation rate. Through the simulation, It is found that the proposed scheme that uses time trees shows better characteristics than the previous scheme in energy and data arrival rate to the burst traffic.","PeriodicalId":290107,"journal":{"name":"2009 Fourth International Conference on Embedded and Multimedia Computing","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127076248","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Use Object-Oriented Platform to Facilitate FPGA-Based Computing in Embedded Systems","authors":"Zhilei Chai, Ping Zhang, Mi Zhang","doi":"10.1109/EM-COM.2009.5402993","DOIUrl":"https://doi.org/10.1109/EM-COM.2009.5402993","url":null,"abstract":"As a special-purpose computer system to solve specific problems, the embedded system is very suited to be implemented by the FPGA. However, without fixed hardware architecture, the FPGA-based computing system is mostly a mixture of hardware and software. This kind of system is difficult to design because hardware and software are developed using quite different models of computation. To handle this problem, a FPGA-based platform supporting Java programming language is proposed in this paper. This platform has two aspects: 1) to find the applications amenable to very large speedup using FPGA-based systems, such as computer vision, image processing, microarray analysis and so on. 2) To provide a three level solution making the hardware transparent to application programmers. This platform is expected to provide an effective way to accelerate FPGA-based custom computing to be used in embedded systems. Keywords-embedded systems; object-oriented; FPGA(field programmable gate arrays)","PeriodicalId":290107,"journal":{"name":"2009 Fourth International Conference on Embedded and Multimedia Computing","volume":"192 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123258806","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Analysis and Optimization of Embedded Software Energy Consumption on the Source Code and Algorithm Level","authors":"Gang Luo, Bing Guo, Yan Shen, HaiYan Liao, Lei Ren","doi":"10.1109/EM-COM.2009.5402965","DOIUrl":"https://doi.org/10.1109/EM-COM.2009.5402965","url":null,"abstract":"The energy consumption optimization of embedded systems can be undertaken in multiple levels of hardware and software. In this paper, based on the energy consumption measurement of embedded software, the generating reasons and influencing factors of embedded software energy consumption on the micro-structure and circuit level of hardware were analyzed firstly. Then, to reduce the energy consumption of embedded software, some measures were adopted to improve the software-related characteristics on the source code and algorithm level. Finally, a C program of typical \" Eight Queens \" puzzle was optimized with three methods of source code level, algorithm level and a mix of source code and algorithm level, the highest energy savings of embedded systems could achieve up to 93.1%, and experimental results demonstrated that the energy consumption optimization methods of embedded software were feasible and effective to minimize the energy consumption of embedded systems.","PeriodicalId":290107,"journal":{"name":"2009 Fourth International Conference on Embedded and Multimedia Computing","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122266552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Color Image of Tamper Detection and Recovery Using Block-Based Watermarking","authors":"Na Wang, C. Kim","doi":"10.1109/EM-COM.2009.5402976","DOIUrl":"https://doi.org/10.1109/EM-COM.2009.5402976","url":null,"abstract":"in this paper, we propose a digital watermarking scheme about color image of tamper detection and recovery using block-based watermarking. Firstly, in our watermark embedding, each color channel (R, G, and B) is divided into 2×2 non-overlapping blocks. The embedding space is created by setting the three LSBs (least significant bits) of selected each block to zero, which will hold the authentication and recovery codes. The authentication codes are obtained through doing exclusive-or (XOR) both the extracted local features of image blocks and the generated global features of the original color image. The recovery codes are generated using block-mapping original color image and using color model conversion. Secondly, in the tamper detection, instead of examining each embedded authentication data, we get the global features of the tampered watermarked image through doing XOR both all the extracted authentication codes and the generated local features of tampered watermarked image blocks. And then we utilize a majority-selecting technique to detect the legitimacy of image blocks. Lastly, in the tamper recovery, we propose 3 stages to accomplish recovery ability. Experiment demonstrates that our scheme is oblivious, correctly localizes the tampering wherever the tampered positions are and can be successfully accomplish to recover with acceptable visual quality. However, the watermark is no longer a logo or a piece of message; it is the image itself. In this paper, the embedding space for watermark, which are authentication and recovery codes, is created by setting the three LSBs of selected each block to zero and is required to hold in the LSBs plane. The authentication codes embedded in image blocks is generated by exploiting both the local features of image blocks and the global features of the images which are from hashing function to verify the integrity of an image. At the same time, the recovery codes are generated from block-mapping original image and they are also embedded original image blocks for accomplishing the recovery abilities. In the tamper detection process, the proposed scheme use generated global features of the tampered watermarked image and utilizes a majority-selecting technique (6) to determine the legitimacy of image blocks. In the tamper recovery process, we propose 3 stages to accomplish and improve recovery abilities using the recovery data generation and average intensity of its 3×3 neighboring block values. Experimental results show that the precision of tamper detection and localization is close to 100% under different positions attacks. In addition, the results reveal that the tampered regions can be approximately recovered with satisfactory image quality. The reminder of the paper is organized as follows. Section II describes the proposed block-based watermarking scheme including watermark generation and embedding procedure, tamper detection procedure and tamper recovery procedure. In Section III, the experimental resul","PeriodicalId":290107,"journal":{"name":"2009 Fourth International Conference on Embedded and Multimedia Computing","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114385112","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}