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2012 IEEE International Symposium on Circuits and Systems最新文献

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Intelligent cage for remotely powered freely moving animal telemetry systems 智能笼为远程供电自由移动的动物遥测系统
2012 IEEE International Symposium on Circuits and Systems Pub Date : 2012-05-20 DOI: 10.1109/ISCAS.2012.6271728
Enver G. Kilinc, B. Canovas, F. Maloberti, C. Dehollain
{"title":"Intelligent cage for remotely powered freely moving animal telemetry systems","authors":"Enver G. Kilinc, B. Canovas, F. Maloberti, C. Dehollain","doi":"10.1109/ISCAS.2012.6271728","DOIUrl":"https://doi.org/10.1109/ISCAS.2012.6271728","url":null,"abstract":"An intelligent power feedback design for remotely powered freely moving animal telemetry systems is described. The system uses an optimized wireless power transmission that utilizes multiple transceiver coils. An intelligent mouse cage with controller unit of the feedback system are proposed. System description, experimental setup and measurements of the remotely powered implantable monitoring system are presented.","PeriodicalId":283372,"journal":{"name":"2012 IEEE International Symposium on Circuits and Systems","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114595526","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Fast transient response CFA-based LDO regulator 基于cfa的快速瞬态响应LDO调节器
2012 IEEE International Symposium on Circuits and Systems Pub Date : 2012-05-20 DOI: 10.1109/ISCAS.2012.6271990
A. Saberkari, H. Martínez, E. Alarcón
{"title":"Fast transient response CFA-based LDO regulator","authors":"A. Saberkari, H. Martínez, E. Alarcón","doi":"10.1109/ISCAS.2012.6271990","DOIUrl":"https://doi.org/10.1109/ISCAS.2012.6271990","url":null,"abstract":"In this paper a fast transient response low-dropout regulator (LDO) based on a current feedback amplifier (CFA) is presented. The utilized CFA consists of an open-loop voltage follower with output local current-current feedback based on a level-shifted flipped voltage follower (LSFVF) to achieve high regulation and fast transient response. The inverting output buffer stage of the CFA together with current-mirror-based driving of the power pass transistor results in high PSRR. The circuit does not require any internal compensation capacitor and is stable for a wide range of output load currents 0-100 mA and a 1μF output capacitor. Post-layout simulation results for a 0.35μm CMOS process reveal that the maximum output voltage deviation of the proposed LDO for 0-100mA load transient with rise and fall times of 10 and 100ns is only 3mV, and the PSRR is smaller than -56dB over the entire load current range.","PeriodicalId":283372,"journal":{"name":"2012 IEEE International Symposium on Circuits and Systems","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114373055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A two level mode decision algorithm for H.264 high profile intra encoding H.264高调帧内编码的两级模式决策算法
2012 IEEE International Symposium on Circuits and Systems Pub Date : 2012-05-20 DOI: 10.1109/ISCAS.2012.6272077
Cheng-Yen Chang, Cheng-An Chien, Hsiu-Cheng Chang, Jia-Wei Chen, Jiun-In Guo
{"title":"A two level mode decision algorithm for H.264 high profile intra encoding","authors":"Cheng-Yen Chang, Cheng-An Chien, Hsiu-Cheng Chang, Jia-Wei Chen, Jiun-In Guo","doi":"10.1109/ISCAS.2012.6272077","DOIUrl":"https://doi.org/10.1109/ISCAS.2012.6272077","url":null,"abstract":"A two level mode decision algorithm considering edge information for H.264 high profile intra encoding is proposed to reduce the computational complexity. In level one mode decision, the edge information is used to decide the appropriate intra coding block size according to the observations that a smooth macroblock usually chooses the large intra coding block size, and that a complex macroblock usually chooses the small one. In level two mode decision, we use the correlation between adjacent blocks to decide the appropriate prediction modes. The proposed method achieves 34%~59% reduction of computational complexity when compared to JM14 and the PSNR only drops 0.09 db in average.","PeriodicalId":283372,"journal":{"name":"2012 IEEE International Symposium on Circuits and Systems","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114723098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Constrained active contours for boundary refinement in interactive image segmentation 交互式图像分割中约束活动轮廓的边界细化
2012 IEEE International Symposium on Circuits and Systems Pub Date : 2012-05-20 DOI: 10.1109/ISCAS.2012.6272179
Thi Nhat Anh Nguyen, Jianfei Cai, Juyong Zhang, Jianmin Zheng
{"title":"Constrained active contours for boundary refinement in interactive image segmentation","authors":"Thi Nhat Anh Nguyen, Jianfei Cai, Juyong Zhang, Jianmin Zheng","doi":"10.1109/ISCAS.2012.6272179","DOIUrl":"https://doi.org/10.1109/ISCAS.2012.6272179","url":null,"abstract":"The state-of-the-art interactive image segmentation algorithms are often not able to produce accurate segmentation results with one-shot user input, and they frequently rely on laborious user editing to refine the segmentation boundary. In this paper, we propose a constrained active contour method for boundary refinement, which can be used to improve the segmentation results of many existing region-based interactive segmentation algorithms. Our constrained active contour model exhibits many desired properties for a good boundary refinement tool, including the robustness to user inputs, the ability to produce a smooth and accurate boundary contour, and the ability to handle topology changes. Experimental results show that the proposed refinement tool is highly effective and can significantly improve initial segmentation results without additional user inputs.","PeriodicalId":283372,"journal":{"name":"2012 IEEE International Symposium on Circuits and Systems","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115095669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
A low-cost low-power non-volatile memory for RFID applications 用于RFID应用的低成本低功耗非易失性存储器
2012 IEEE International Symposium on Circuits and Systems Pub Date : 2012-05-20 DOI: 10.1109/ISCAS.2012.6271623
Hadar Dagan, A. Teman, A. Fish, E. Pikhay, V. Dayan, Y. Roizin
{"title":"A low-cost low-power non-volatile memory for RFID applications","authors":"Hadar Dagan, A. Teman, A. Fish, E. Pikhay, V. Dayan, Y. Roizin","doi":"10.1109/ISCAS.2012.6271623","DOIUrl":"https://doi.org/10.1109/ISCAS.2012.6271623","url":null,"abstract":"One of the main obstacles delaying a more widespread use of radio frequency identification (RFID) tags is cost. A critical element of any RFID system is a low power embedded non-volatile memory (NVM) that can be fabricated without additional masks to the core CMOS process. In this paper, we present a 256-bit re-writeable NVM array, implemented in the TowerJazz 0.18µm CMOS process using only standard logic process steps and masks. Based on the single-poly C-Flash bitcell, this array achieves an extremely low static power figure of 3.8µW during operation cycles.","PeriodicalId":283372,"journal":{"name":"2012 IEEE International Symposium on Circuits and Systems","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117011981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Lower-bits cache for low power STT-RAM caches 低位缓存用于低功耗STT-RAM缓存
2012 IEEE International Symposium on Circuits and Systems Pub Date : 2012-05-20 DOI: 10.1109/ISCAS.2012.6272069
Junwhan Ahn, Kiyoung Choi
{"title":"Lower-bits cache for low power STT-RAM caches","authors":"Junwhan Ahn, Kiyoung Choi","doi":"10.1109/ISCAS.2012.6272069","DOIUrl":"https://doi.org/10.1109/ISCAS.2012.6272069","url":null,"abstract":"As power-efficient design becomes more important, spin-transfer torque RAM (STT-RAM) has drawn a lot of attention due to its ability to meet both high performance and low power consumption. However, its high write energy incurs an increase of dynamic power consumption and may offset power saving due to its low static power. This paper proposes a novel technique called lower-bits caches for reducing write activities of STT-RAM L2 caches. Based on the observation that upper bits of data are not changed as frequently as lower bits in most applications, the technique tries to hide frequent bit changes in lower bits from the L2 cache. Experimental results show that our architecture reduced 25 percent of energy consumed by the L2 cache and slightly improved performance at the same time compared to the STT-RAM baseline.","PeriodicalId":283372,"journal":{"name":"2012 IEEE International Symposium on Circuits and Systems","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117016772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 26
A visually-lossless data hiding method based on histogram modification 一种基于直方图修改的视觉无损数据隐藏方法
2012 IEEE International Symposium on Circuits and Systems Pub Date : 2012-05-20 DOI: 10.1109/ISCAS.2012.6271585
M. Fujiyoshi, H. Kiya
{"title":"A visually-lossless data hiding method based on histogram modification","authors":"M. Fujiyoshi, H. Kiya","doi":"10.1109/ISCAS.2012.6271585","DOIUrl":"https://doi.org/10.1109/ISCAS.2012.6271585","url":null,"abstract":"This paper proposes a new method of visually-lossless data hiding. The proposed method firstly applies a nonlinear quantization to an original image accordingly to the size of a payload to be hidden. The method, then, embeds the payload to the quantized image based on a histogram modification-based lossless data hiding technique. The hidden payload can be extracted reversibly and be completely removed from the image to recover the quantized image. Experimental results show the effectiveness of the proposed method.","PeriodicalId":283372,"journal":{"name":"2012 IEEE International Symposium on Circuits and Systems","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117148402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Low complexity iterative multimedia resource allocation based on game theoretic approach 基于博弈论方法的低复杂度迭代多媒体资源分配
2012 IEEE International Symposium on Circuits and Systems Pub Date : 2012-05-20 DOI: 10.1109/ISCAS.2012.6271422
Eunji Kim, Hyunggon Park, P. Frossard
{"title":"Low complexity iterative multimedia resource allocation based on game theoretic approach","authors":"Eunji Kim, Hyunggon Park, P. Frossard","doi":"10.1109/ISCAS.2012.6271422","DOIUrl":"https://doi.org/10.1109/ISCAS.2012.6271422","url":null,"abstract":"Efficient resource management strategies are important for multiuser multimedia applications, as they are often serviced over resource-constrained and shared network infrastructure. Moreover, an acceptable level of quality e.g., Quality of Service (QoS) should be guaranteed. In this paper, we consider a game-theoretic resource management strategy, where the bargaining solutions are deployed in the resource allocation. We are in particular interested in the Nash Bargaining Solution (NBS) that can allocate resources in a fair and optimal way, while explicitly considering the achieved utility. Finding the NBS, however, is a challenging task due to its potentially high computational complexity, especially when a large number of users and the large amount of resources are available. In order to overcome the problem, we propose an iterative approach that requires significantly lower computational complexity compared to the conventional approach. The proposed approach decomposes the bargaining problem into sub-bargaining problems, where a sub-bargaining problem considers smaller feasible set and computes the corresponding sub-NBS. This step is iteratively repeated for successive sub-bargaining problems until the NBS is obtained. We show that the proposed sub-NBS approaches the NBS with a small error while significantly reducing the complexity required to find the NBS.","PeriodicalId":283372,"journal":{"name":"2012 IEEE International Symposium on Circuits and Systems","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117172117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A novel peripheral circuit for RRAM-based LUT 一种基于随机存储器的LUT外围电路
2012 IEEE International Symposium on Circuits and Systems Pub Date : 2012-05-20 DOI: 10.1109/ISCAS.2012.6271619
Yi-Chung Chen, Hai Helen Li, Wei Zhang
{"title":"A novel peripheral circuit for RRAM-based LUT","authors":"Yi-Chung Chen, Hai Helen Li, Wei Zhang","doi":"10.1109/ISCAS.2012.6271619","DOIUrl":"https://doi.org/10.1109/ISCAS.2012.6271619","url":null,"abstract":"Resistive random access memory (RRAM) is a promising candidate to substitute static random access memory (SRAM) in lookup table (LUT) design for its high density and non-volatility. RRAM cells are fabricated at backend CMOS process and have negligible area cost. However, the complex peripheral circuit design to satisfy performance and accuracy requirements becomes a major issue. In this work, we propose a novel peripheral circuit for RRAM-based LUT. A new decoding scheme that supports dynamic programming is introduced. Furthermore, the expanded RRAM crossbar array together with the latch comparator based sense amplifier can dramatically reduce design complexity, decrease area cost, and improve tolerance on process variations. Compared to a 6-input SRAM-based LUT, the proposed RRAM-based one cuts off 60.4% of layout area. The maximal operating frequency reaches 1GHz at 10mV input difference. Simulations also show that the proposed LUT functions properly even RRAM resistances deviates 20% from the design value.","PeriodicalId":283372,"journal":{"name":"2012 IEEE International Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116409498","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
Maximizing power harvest in a distributed photovoltaic system 分布式光伏系统的最大电力收获
2012 IEEE International Symposium on Circuits and Systems Pub Date : 2012-05-20 DOI: 10.1109/ISCAS.2012.6271747
Y. Kim, S. Kang, R. Winston
{"title":"Maximizing power harvest in a distributed photovoltaic system","authors":"Y. Kim, S. Kang, R. Winston","doi":"10.1109/ISCAS.2012.6271747","DOIUrl":"https://doi.org/10.1109/ISCAS.2012.6271747","url":null,"abstract":"In a conventional grid-tied distributed photovoltaic (PV) system, individual power optimizers are used for modules connected in series to maximize energy harvest from each module. However each power optimizer lacks information on the string voltage and thus an inverter is designed to control the string voltage. This scheme is not guaranteed to have the maximum energy harvest in a PV system since the efficiency of an inverter is dependent not only on the string voltage but also on the string current. To improve the overall system efficiency, this paper presents a dual power optimization scheme for grid-tied distributed PV systems. It uses a power optimizer with feedback from the output of an inverter which controls the string voltage dynamically. We compare the proposed conversion system with the conventional distributed system in view of efficiency using simulation of commercial products.","PeriodicalId":283372,"journal":{"name":"2012 IEEE International Symposium on Circuits and Systems","volume":"27 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120845240","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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