2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems最新文献_第6页

Taming Wild Horses: The Need for Virtual Time-Based Scheduling of VMs in Network Simulations

2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems Pub Date : 2012-08-07 DOI: 10.1109/MASCOTS.2012.18

Srikanth B. Yoginath, K. Perumalla, B. Henz

{"title":"Taming Wild Horses: The Need for Virtual Time-Based Scheduling of VMs in Network Simulations","authors":"Srikanth B. Yoginath, K. Perumalla, B. Henz","doi":"10.1109/MASCOTS.2012.18","DOIUrl":"https://doi.org/10.1109/MASCOTS.2012.18","url":null,"abstract":"The next generation of scalable network simulators employ virtual machines (VMs) to act as high-fidelity models of traffic producer/consumer nodes in simulated networks. However, network simulations could be inaccurate if VMs are not scheduled according to virtual time, especially when many VMs are hosted per simulator core in a multi-core simulator environment. Since VMs are by default free-running, on the outset, it is not clear if, and to what extent, their untamed execution affects the results in simulated scenarios. Here, we provide the first quantitative basis for establishing the need for generalized virtual time scheduling of VMs in network simulators, based on an actual prototyped implementations. To exercise breadth, our system is tested with disparate applications: (a) a set of message passing parallel programs, (b) a computer worm propagation phenomenon, and (c) a mobile ad-hoc wireless network simulation. We define and use error metrics and benchmarks in scaled tests to empirically report the poor match of traditional, fairness-based VM scheduling to VM-based network simulation, and also clearly show the better performance of our simulation-specific scheduler, with up to 64 VMs hosted on a 12-core simulator node.","PeriodicalId":278764,"journal":{"name":"2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125121641","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Content Sharing Dynamics in the Global File Hosting Landscape 全局文件托管环境中的内容共享动态

2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems Pub Date : 2012-08-07 DOI: 10.1109/MASCOTS.2012.34

Aniket Mahanti, Niklas Carlsson, C. Williamson

引用次数: 15

Transparent and Efficient Shared-State Management for Optimistic Simulations on Multi-core Machines 透明高效的多核机器乐观模拟共享状态管理

2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems Pub Date : 2012-08-07 DOI: 10.1109/MASCOTS.2012.25

Alessandro Pellegrini, Roberto Vitali, Sebastiano Peluso, F. Quaglia

{"title":"Transparent and Efficient Shared-State Management for Optimistic Simulations on Multi-core Machines","authors":"Alessandro Pellegrini, Roberto Vitali, Sebastiano Peluso, F. Quaglia","doi":"10.1109/MASCOTS.2012.25","DOIUrl":"https://doi.org/10.1109/MASCOTS.2012.25","url":null,"abstract":"Traditionally, Logical Processes (LPs) forming a simulation model store their execution information into disjoint simulations states, forcing events exchange to communicate data between each other. In this work we propose the design and implementation of an extension to the traditional Time Warp (optimistic) synchronization protocol for parallel/distributed simulation, targeted at shared-memory/multicore machines, allowing LPs to share parts of their simulation states by using global variables. In order to preserve optimism's intrinsic properties, global variables are transparently mapped to multi-version ones, so to avoid any form of safety predicate verification upon updates. Execution's consistency is ensured via the introduction of a new rollback scheme which is triggered upon the detection of an incorrect global variable's read. At the same time, efficiency in the execution is guaranteed by the exploitation of non-blocking algorithms in order to manage the multi-version variables' lists. Furthermore, our proposal is integrated with the simulation model's code through software instrumentation, in order to allow the application-level programmer to avoid using any specific API to mark or to inform the simulation kernel of updates to global variables. Thus we support full transparency. An assessment of our proposal, comparing it with a traditional message-passing implementation of variables' multi-version is provided as well.","PeriodicalId":278764,"journal":{"name":"2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124182640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 17

Hybrot: Towards Improved Performance in Hybrid SLC-MLC Devices Hybrot:迈向混合SLC-MLC器件的性能改进

2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems Pub Date : 2012-08-07 DOI: 10.1109/MASCOTS.2012.60

M. Murugan, D. Du

引用次数: 17

Modeling Large Scale Circuits Using Massively Parallel Discrete-Event Simulation 用大规模并行离散事件仿真方法模拟大规模电路

2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems Pub Date : 2012-08-07 DOI: 10.1109/MASCOTS.2012.24

Elsa Gonsiorowski, C. Carothers, C. Tropper

{"title":"Modeling Large Scale Circuits Using Massively Parallel Discrete-Event Simulation","authors":"Elsa Gonsiorowski, C. Carothers, C. Tropper","doi":"10.1109/MASCOTS.2012.24","DOIUrl":"https://doi.org/10.1109/MASCOTS.2012.24","url":null,"abstract":"As computing systems grow to exascale levels of performance, the smallest elements of a single processor can greatly affect the entire computer system (e.g. its power consumption). As future generations of processors are developed, simulation at the gate level is necessary to ensure that the necessary target performance benchmarks are met prior to fabrication. The most common simulation tools available today utilize either a single node or small clusters and as such create a bottleneck in the development process. This paper focuses on the massively parallel simulation of logic gate circuit models using supercomputer systems. The focus of this performance study leverages the OpenSPARC T2 processor design using Rensselaer's Optimistic Simulation System (ROSS). We conduct simulations of the crossbar component on both a 24-core SMP machine and an IBM Blue Gene/L. Using a single SMP core as the baseline, our performance experiments on 1024 cores of the Blue Gene/L demonstrate more than 131-times faster execution. Our results capitalize on the balanced compute and network power of the Blue Gene/L system.","PeriodicalId":278764,"journal":{"name":"2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121604518","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 16

Energy-Aware Execution of Fork-Join-Based Task Parallelism 基于fork - join的任务并行性的能量感知执行

2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems Pub Date : 2012-08-07 DOI: 10.1109/MASCOTS.2012.35

T. Rauber, G. Rünger

引用次数: 19

Improving the Performance Efficiency of an IDS by Exploiting Temporal Locality in Network Traffic 利用网络流量的时间局部性来提高IDS的性能效率

2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems Pub Date : 2012-08-01 DOI: 10.1109/MASCOTS.2012.56

Govind Sreekar Shenoy, Jordi Tubella, Antonio González

{"title":"Improving the Performance Efficiency of an IDS by Exploiting Temporal Locality in Network Traffic","authors":"Govind Sreekar Shenoy, Jordi Tubella, Antonio González","doi":"10.1109/MASCOTS.2012.56","DOIUrl":"https://doi.org/10.1109/MASCOTS.2012.56","url":null,"abstract":"Network traffic has traditionally exhibited temporal locality in the header field of packets. Such locality is intuitive and is a consequence of the semantics of network protocols. However, in contrast, the locality in the packet payload has not been studied in significant detail. In this work we study temporal locality in the packet payload. Temporal locality can also be viewed as redundancy, and we observe significant redundancy in the packet payload. We investigate mechanisms to exploit it in a networking application. We choose Intrusion Detection Systems (IDS) as a case study. An IDS like the popular Snort operates by scanning packet payload for known attack strings. It first builds a Finite State Machine (FSM) from a database of attack strings, and traverses this FSM using bytes from the packet payload. So temporal locality in network traffic provides us an opportunity to accelerate this FSM traversal. Our mechanism dynamically identifies redundant bytes in the packet and skips their redundant FSM traversal. We further parallelize our mechanism by performing the redundancy identification concurrently with stages of Snort packet processing. IDS are commonly deployed in commodity processors, and we evaluate our mechanism on an Intel Core i3. Our performance study indicates that the length of the redundant chunk is a key factor in performance. We also observe important performance benefits in deploying our redundancy-aware mechanism in the Snort IDS[32].","PeriodicalId":278764,"journal":{"name":"2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132841921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Two Sides of a Coin: Optimizing the Schedule of MapReduce Jobs to Minimize Their Makespan and Improve Cluster Performance 一枚硬币的两面:优化MapReduce作业的调度以最小化其Makespan并提高集群性能

2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems Pub Date : 2012-06-21 DOI: 10.1109/MASCOTS.2012.12

Abhishek Verma, L. Cherkasova, R. Campbell

引用次数: 109

Squeezing Out the Cloud via Profit-Maximizing Resource Allocation Policies 通过利润最大化的资源分配策略挤出云

2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems Pub Date : 2012-05-26 DOI: 10.1109/MASCOTS.2012.13

M. Mazzucco, Martti Vasar, M. Dumas

引用次数: 16

Performance Modeling and Characterization of Large Last Level Caches 大型末级缓存的性能建模与表征

2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems Pub Date : 2012-04-01 DOI: 10.1109/ISPASS.2012.6189215

Parijat Dube, M. Tsao, Li Zhang, A. Bivens

引用次数: 2