2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)最新文献

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Validity of compact gate C — V model on SiC-SiO2 MOS device SiC-SiO2 MOS器件紧凑栅C- V模型的有效性
C. Chakraborty
{"title":"Validity of compact gate C — V model on SiC-SiO2 MOS device","authors":"C. Chakraborty","doi":"10.1109/CODIS.2012.6422238","DOIUrl":"https://doi.org/10.1109/CODIS.2012.6422238","url":null,"abstract":"The compact gate capacitance-voltage (C-V) model is utilized to verify the experimentally obtained C-V curves for n-type SiC-SiO2 MOS devices. The model is well in agreement with the experimental data. The dependence of capacitance on oxide thickness and flatband voltage are also investigated.","PeriodicalId":274831,"journal":{"name":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131498476","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Neuro-Fuzzy based adaptive traffic flow control system 基于神经模糊的自适应交通流控制系统
M. A. Iqbal, A. Zahin, Z. Islam, M. S. Kaiser
{"title":"Neuro-Fuzzy based adaptive traffic flow control system","authors":"M. A. Iqbal, A. Zahin, Z. Islam, M. S. Kaiser","doi":"10.1109/CODIS.2012.6422210","DOIUrl":"https://doi.org/10.1109/CODIS.2012.6422210","url":null,"abstract":"In this paper a Neuro-Fuzzy (NF) based traffic control system has been proposed which can take intelligent decision based on present traffic condition. Here we have trained the Adaptive Neuro-Fuzzy Inference System (ANFIS) system by variable traffic data and the output of this system is compared with Fuzzy logic based and Fixed Time based traffic control system. NF based traffic control system has been found more efficient as the average vehicular delay and the number of vehicles waiting in an intersection have been reduced.","PeriodicalId":274831,"journal":{"name":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132978939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Simulation and analysis of quantum capacitance in single-gate MOSFET, double-gate MOSFET and CNTFET devices for nanometre regime 纳米级单门MOSFET、双门MOSFET和CNTFET器件中量子电容的仿真与分析
S. K. Sinha, S. Chaudhury
{"title":"Simulation and analysis of quantum capacitance in single-gate MOSFET, double-gate MOSFET and CNTFET devices for nanometre regime","authors":"S. K. Sinha, S. Chaudhury","doi":"10.1109/CODIS.2012.6422160","DOIUrl":"https://doi.org/10.1109/CODIS.2012.6422160","url":null,"abstract":"Carbon nanotube based FET devices are getting more and more importance today because of their high channel mobility and improved gate capacitance versus voltage characteristics. In this paper we compare and analyse the effect of gate capacitance on varying oxide thickness for single gate MOSFET, double gate MOSFET and CNTFET. It is seen that in nanometre regime quantum capacitance plays the major role in deciding the gate capacitance of a CNTFET and we find a favourable characteristics of decreasing gate capacitance with the decrease in the oxide thickness which is not possible to get in single gate silicon MOSFET and double gate MOSFET.","PeriodicalId":274831,"journal":{"name":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130981705","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A 2D analytical modeling approach for nanoscale strained-Si (s-Si) on silicon-germanium-on-insulator (SGOI) MOSFETs by evanescent mode analysis 基于倏逝模分析的SGOI mosfet纳米级应变si (s-Si)解析建模方法
M. Kumar, S. Dubey, S. Jit, P. Tiwari
{"title":"A 2D analytical modeling approach for nanoscale strained-Si (s-Si) on silicon-germanium-on-insulator (SGOI) MOSFETs by evanescent mode analysis","authors":"M. Kumar, S. Dubey, S. Jit, P. Tiwari","doi":"10.1109/CODIS.2012.6422235","DOIUrl":"https://doi.org/10.1109/CODIS.2012.6422235","url":null,"abstract":"This paper presents a compact two-dimensional (2D) analytical model of short-channel strained-Si on SGOI MOSFETs. The channel potential is obtained by solving 2D Poisson's equation using evanescent mode analysis. The analytical model takes into account the effects of all the device parameters along with Ge mole fraction in the relaxed SiGe layer on the subthreshold device characteristics. In addition, the threshold voltage and subthreshold slope, the key subthreshold physical parameters, are formulated by employing surface potential. For the validation of model, the model results have been compared with numerical simulation results from ATLAS™ by Silvaco.","PeriodicalId":274831,"journal":{"name":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","volume":"2 1-2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132570398","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Development of wireless insole foot pressure data acquisition device 无线鞋垫足压数据采集装置的研制
O. Mazumder, A. S. Kundu, S. Bhaumik
{"title":"Development of wireless insole foot pressure data acquisition device","authors":"O. Mazumder, A. S. Kundu, S. Bhaumik","doi":"10.1109/CODIS.2012.6422198","DOIUrl":"https://doi.org/10.1109/CODIS.2012.6422198","url":null,"abstract":"The aim of this paper is to develop a wireless insole foot pressure acquisition device to measure and analyze foot planter pressure during various physical activities. Developed system consists of a pressure insole with four capacitive pressure sensors for each foot. Entire system is developed in house indigenously. Sensors are placed at four foot pressure points and interfaced with microcontroller and wireless acquisition board. Sensors are interfaced with dedicated electronics board made of Capacitance to Digital IC which converts change in capacitance due to foot pressure to an equivalent digital readout. Graphical User Interface is provided for different data curve plot, testing of pressure insole, quantifying force and pressure. A mobile and versatile pressure insole for analysis of foot pressure distribution and magnitude provides useful information to diagnose various foot disorders. Planter pressure measurement during standing, walking and other activity can demonstrate biomechanics of abnormal foot, can analyze diabetic offloading, sports medicine, pre and post treatment evaluation and yield measurement to track distance progression.","PeriodicalId":274831,"journal":{"name":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128875462","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
Antenna array synthesis by implementing non-uniform amplitude using Fuzzy logic 利用模糊逻辑实现非均匀幅值的天线阵列合成
S. Bandyopadhyay, H. Mistri, B. Maji
{"title":"Antenna array synthesis by implementing non-uniform amplitude using Fuzzy logic","authors":"S. Bandyopadhyay, H. Mistri, B. Maji","doi":"10.1109/CODIS.2012.6422174","DOIUrl":"https://doi.org/10.1109/CODIS.2012.6422174","url":null,"abstract":"This paper deals with a scheme of Antenna array synthesis by varying amplitude using Fuzzy logic. Here it has been tried to get new radiation pattern of the antenna array by changing the amplitude of the antenna array elements. Spacing between the elements of the antenna array and the corresponding phase - shift is given to the input of the Fuzzy logic controller and corresponding defuzzified values of amplitude is obtained at the output of the controller. Putting the new values of amplitude to the each and every element, the new radiation pattern will be obtained. This method can be used for the reduction of the Side Lobe Level (SLL) of the antenna radiation pattern to a certain extent where the exact values of the spacing and phase - shift is not known.","PeriodicalId":274831,"journal":{"name":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","volume":"242 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117347902","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Design and simulation of integrated optic ring resonator based devices 基于集成光环谐振器的器件设计与仿真
I. Bhar, T. Jha, P. Priya, S. Dey
{"title":"Design and simulation of integrated optic ring resonator based devices","authors":"I. Bhar, T. Jha, P. Priya, S. Dey","doi":"10.1109/CODIS.2012.6422236","DOIUrl":"https://doi.org/10.1109/CODIS.2012.6422236","url":null,"abstract":"A wide free spectral range (FSR) quadruple optical ring resonator (QORR) made of silicon on insulator (SOI) as an optical filter has been investigated in this article. FSR obtained in this article is well in the range of commercial communication like dense wavelength division multiplexing (DWDM) systems standard. The underlying principle of analysis is delay line signal processing in z-domain, Mason's Gain formula and Vernier Principle. This QORR is able to produce an FSR of 1175 THz with crosstalk limited within -50dB which is much less than the stipulated limit of -30dB. Group delay, dispersion, finesse have also been analyzed.","PeriodicalId":274831,"journal":{"name":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121968411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Accurate SER expressions for M-ary dual ring star QAM in fading channels m - 1双环星QAM在衰落信道中的精确SER表达式
S. Dutta, A. Chandra
{"title":"Accurate SER expressions for M-ary dual ring star QAM in fading channels","authors":"S. Dutta, A. Chandra","doi":"10.1109/CODIS.2012.6422121","DOIUrl":"https://doi.org/10.1109/CODIS.2012.6422121","url":null,"abstract":"Analytical expressions for symbol error rate (SER) of M-ary dual ring star shaped quadrature amplitude modulation (QAM), when corrupted by additive white Gaussian noise (AWGN), have been derived. Utilizing the result for AWGN channel, SER expressions for various frequency non-selective slow fading channels (e.g. Rayleigh, Rician, and Nakagami-m) are also found. The results obtained are in the form of summation of single integrals which can be easily calculated through numerical methods. More importantly, compared to the erroneous results published earlier, the derived expressions are accurate. Extensive Monte Carlo simulations were performed to validate the analytical framework. The inadequacy of Gray's approximation for calculation of bit error rate (BER) has also been pointed out.","PeriodicalId":274831,"journal":{"name":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128961265","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Analysis of crosstalk delay and power dissipation in mixed CNT bundle interconnects 混合碳纳米管束互连串扰延迟及功耗分析
M. Majumder, B. Kaushik, S. Manhas, J. Kumar
{"title":"Analysis of crosstalk delay and power dissipation in mixed CNT bundle interconnects","authors":"M. Majumder, B. Kaushik, S. Manhas, J. Kumar","doi":"10.1109/CODIS.2012.6422213","DOIUrl":"https://doi.org/10.1109/CODIS.2012.6422213","url":null,"abstract":"This research paper presents a comparative analysis of power and delay performance between different bundled carbon nanotube (CNT) structures. An equivalent RLC model is developed for novel mixed CNT bundle structures that contains single- and multi-walled CNTs (SWCNTs and MWCNTs). Crosstalk delay and power dissipation have been compared for these proposed structures of mixed CNT bundles. It has been observed that at an average the power and delay performances are improved by 61.33% and 86.01% respectively for the novel mixed bundle structure that contains SWCNTs and MWCNTs in equal halves in comparison to bundled SWCNT.","PeriodicalId":274831,"journal":{"name":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132898179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Design of high delay block using voltage scaling technique 采用电压缩放技术设计高延时模块
C. Chaudhuri, V. Kumar, N. N. Ghosh, A. K. Mal
{"title":"Design of high delay block using voltage scaling technique","authors":"C. Chaudhuri, V. Kumar, N. N. Ghosh, A. K. Mal","doi":"10.1109/CODIS.2012.6422237","DOIUrl":"https://doi.org/10.1109/CODIS.2012.6422237","url":null,"abstract":"Delay blocks are an important building block of signal processing circuits. To a great extent, performance of such circuits depend on the efficient design of delay blocks. In this work, a new scheme for designing a high delay chain is presented precisely for low frequency applications. The proposed design is based on the fact that propagation delay of a CMOS inverter increases with scaling down of supply voltage. This technique is highly area and power efficient as compared to other commonly used techniques. Designing of Ring Oscillator and Non-Overlapping-Clock (NOC) generator with the proposed scheme is also demonstrated. Designs are simulated on UMC 180 nm CMOS process with 1.8 V supply. Simulation results presented here strongly support the analysis done throughout the work. It is also shown that as the frequency of operation reduces, the proposed scheme becomes more and more advantageous. PVT analysis confirm the rigidity of the architecture.","PeriodicalId":274831,"journal":{"name":"2012 International Conference on Communications, Devices and Intelligent Systems (CODIS)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128767928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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