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Digital control scheme of UPS inverter to improve the dynamic response UPS逆变器的数字控制方案，提高动态响应
Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering Pub Date : 1996-05-26 DOI: 10.1109/CCECE.1996.548101
Byoung-jin Kim, Jaeho Choi, Jaesig Kim, C. Choi
{"title":"Digital control scheme of UPS inverter to improve the dynamic response","authors":"Byoung-jin Kim, Jaeho Choi, Jaesig Kim, C. Choi","doi":"10.1109/CCECE.1996.548101","DOIUrl":"https://doi.org/10.1109/CCECE.1996.548101","url":null,"abstract":"This paper presents a digital control scheme for a UPS inverter system. The inverter provides a near sinusoidal output voltage waveform with low harmonic distortion factor and must be controlled with very fast dynamic response and robustness to load changes or parameter variations. The proposed scheme is based on the current regulated voltage controller. The filter inductor current is forced to follow the current command calculated from the desired capacitor voltage and the sensed output load current. Clearly, the sensed output current signal acts as a disturbance feedforward signal which leads to a fast dynamic response of the controller to sudden changes of output load current. In order to guarantee the robustness of the system, a PI capacitor voltage controller is added as in the conventional double feedback loop controller. The natural problems of this controller, i.e. the phase difference between the output voltage and its reference caused by the AC quantity of the feedback signal, are compensated by using a synchronization controller for the output voltage phase and frequency. The algorithm of the proposed scheme is described and digital simulation and experimental results from a 5 kVA prototype are provided for verification.","PeriodicalId":269440,"journal":{"name":"Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127069745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A Ka-band GaInP/GaAs HBT double balanced upconvert mixer 一种ka波段GaInP/GaAs HBT双平衡上转换混频器
Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering Pub Date : 1996-05-26 DOI: 10.1109/CCECE.1996.548059
A. Freundorfer, C. Falt
{"title":"A Ka-band GaInP/GaAs HBT double balanced upconvert mixer","authors":"A. Freundorfer, C. Falt","doi":"10.1109/CCECE.1996.548059","DOIUrl":"https://doi.org/10.1109/CCECE.1996.548059","url":null,"abstract":"A Ka-band GaInP/GaAs HBT double balanced upconvert mixer has been designed and fabricated. This circuit is to be used in a multifunction T/R module for local multipoint distribution systems (LMDS) which include both analog and digital transmission. A conversion gain of 1 dB, and an output power of -10 dBm from 27 to 30 GHz for an LO input power of 10 dBm at 26 GHz were measured. The LO isolation to the output was measured to be 20 dB. These results are the best reported at Ka-band for a mixer using transistors from a digital HBT library.","PeriodicalId":269440,"journal":{"name":"Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131063668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
ATM switch design requirements under FEC environment FEC环境下ATM交换机的设计要求
Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering Pub Date : 1996-05-26 DOI: 10.1109/CCECE.1996.548276
A. Almulhem, F. El-Guibaly
{"title":"ATM switch design requirements under FEC environment","authors":"A. Almulhem, F. El-Guibaly","doi":"10.1109/CCECE.1996.548276","DOIUrl":"https://doi.org/10.1109/CCECE.1996.548276","url":null,"abstract":"ATM relies on very low error rate fiber-optic cables for cell transport. Very soon, ATM will be used over wireless and satellite channels. These upcoming channels will add noise which contribute to cell loss besides congestion. Time-sensitive (delay-critical) applications suffer the most due to cell loss. This imposes more resources to be allocated which might be costly and not desired. Automatic repeat request (ARQ) and forward error correction (FEC) schemes are proposed as alternatives to overcome congestion or reduce its effect. FEC is more advantageous since it potentially requires less resources to be allocated and hence simpler ATM switch design. Hardware requirements such as buffer size are even less than with conventional ATM switches. Two ATM switch designs are discussed; one is suitable for wireless communications and the other is suitable for time-sensitive data.","PeriodicalId":269440,"journal":{"name":"Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130894070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SPICE3 simulation techniques in power electronics 电力电子中的SPICE3仿真技术
Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering Pub Date : 1996-05-26 DOI: 10.1109/CCECE.1996.548237
J. Salmon, E. Bocancea, R. Bhargava, E. Nowicki
{"title":"SPICE3 simulation techniques in power electronics","authors":"J. Salmon, E. Bocancea, R. Bhargava, E. Nowicki","doi":"10.1109/CCECE.1996.548237","DOIUrl":"https://doi.org/10.1109/CCECE.1996.548237","url":null,"abstract":"This paper describes numerous SPICE3 techniques appropriate for power electronics. The recent updates made to SPICE at the University of Berkeley has made obsolete various SPICE simulation techniques often used in power electronics systems. Many new features have also been added to SPICE3 that allow many new circuit design oriented tasks to be performed. The introduction of the \"B-statement\", and the comparison statements, the \"U-ramp\" and \"U-statement\" has simplified the structure of control and switching functions used frequently for power electronics. Various simulation techniques are illustrated with the use of a variable speed drive configuration using a /spl Delta//spl Delta/, /spl Delta/Y input transformer. The current source inverter uses a phase controlled rectifier to regulate the DC link current. The voltage source inverter uses a PWM technique to provide a low THD current on the induction motor side. The paper describes how d-q axis modeling in SPICE3 can be used to model the induction motor and the transformer. Experimental results are used to verify the SPICE3 simulations.","PeriodicalId":269440,"journal":{"name":"Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125455154","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimal power flow via interior point methods: an educational tool in Matlab 通过内点法优化潮流:Matlab中的教育工具
Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering Pub Date : 1996-05-26 DOI: 10.1109/CCECE.1996.548322
G. L. Torres, V. Quintana
{"title":"Optimal power flow via interior point methods: an educational tool in Matlab","authors":"G. L. Torres, V. Quintana","doi":"10.1109/CCECE.1996.548322","DOIUrl":"https://doi.org/10.1109/CCECE.1996.548322","url":null,"abstract":"In this paper, the authors address several issues in solving nonlinear optimal power flow (OPF) problems via sequential linear programming (SLP) with interior point (IP) methods. Two computationally effective IP methods are considered: dual affine scaling and primal-dual logarithmic barrier. A prototype code in Matlab/sup TM/ was developed and made available for educational purposes. By manipulating parameters, users can obtain insights into the issues of OPF solutions via SLP with IP methods.","PeriodicalId":269440,"journal":{"name":"Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126348981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Intelligent manufacturing system control 智能制造系统控制
Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering Pub Date : 1996-05-26 DOI: 10.1109/CCECE.1996.548217
S. Balasubramanian, D. Norrie
{"title":"Intelligent manufacturing system control","authors":"S. Balasubramanian, D. Norrie","doi":"10.1109/CCECE.1996.548217","DOIUrl":"https://doi.org/10.1109/CCECE.1996.548217","url":null,"abstract":"Next generation intelligent manufacturing systems are envisioned to be agile, flexible and fault tolerant. They will be comprised of dynamically reconfigurable factories having decentralized and virtual organization structure. The constituent resources will be capable of addressing both the knowledge processing and material processing requirements simultaneously. In such an environment, the control relationships among the resources will be ever changing, maintained only as long as necessary and reconfigured on the fly. In this paper, the requirements for intelligent control of such systems are identified and the implementation issues are discussed.","PeriodicalId":269440,"journal":{"name":"Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126519229","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Integration of process design and control for chemical processes 化工过程设计与控制的集成
Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering Pub Date : 1996-05-26 DOI: 10.1109/CCECE.1996.548209
J. Zhu, Z. Han, M. Rao, K. Chuang
{"title":"Integration of process design and control for chemical processes","authors":"J. Zhu, Z. Han, M. Rao, K. Chuang","doi":"10.1109/CCECE.1996.548209","DOIUrl":"https://doi.org/10.1109/CCECE.1996.548209","url":null,"abstract":"A general framework based on the well-defined hierarchical decision procedure of process design is proposed for integrated process design and control of plant-wide processes. It consists of analysis stage and synthesis stage. Conclusions about structural controllability and stabilization of composite systems are presented. The framework not only can be used for integrated design and control, and also can be applied for optimal design of composite systems.","PeriodicalId":269440,"journal":{"name":"Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121310538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
On-chip analog signal testing using an undersampling approach 片上模拟信号测试使用欠采样方法
Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering Pub Date : 1996-05-26 DOI: 10.1109/CCECE.1996.548068
R. Mason, B. Simon, K. Runtz
{"title":"On-chip analog signal testing using an undersampling approach","authors":"R. Mason, B. Simon, K. Runtz","doi":"10.1109/CCECE.1996.548068","DOIUrl":"https://doi.org/10.1109/CCECE.1996.548068","url":null,"abstract":"Integrated Circuit (IC) manufacturing processes have been successful in introducing complex high speed analog and mixed signal devices. The paper presents a novel method of testing analog ICs using periodic input stimuli and wide band undersampling. In its simplest form, the testing procedure can be implemented in a design by adding two simple components on-chip: an analog switch to sample the response signal at a particular node under test, and a buffer to bring the sampled values off-chip. Using a sequential undersampling algorithm to control the switch allows high frequency signals to be mixed down in frequency and driven off-chip using a low bandwidth buffer.","PeriodicalId":269440,"journal":{"name":"Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121627030","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Neural network learning and generalization for performance improvement of industrial robots 工业机器人性能改进的神经网络学习与泛化
Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering Pub Date : 1996-05-26 DOI: 10.1109/CCECE.1996.548216
P.C.Y. Chen, J. Mills, G. Vukovich
{"title":"Neural network learning and generalization for performance improvement of industrial robots","authors":"P.C.Y. Chen, J. Mills, G. Vukovich","doi":"10.1109/CCECE.1996.548216","DOIUrl":"https://doi.org/10.1109/CCECE.1996.548216","url":null,"abstract":"In this article, we present an approach for improving the trajectory tracking performance of industrial robots using multilayer feedforward neural networks. The controller design based on this approach consists of a PID control and a neural network. The function of the neural network is to complement the PID controller for improving the performance of the system over time. The proposed approach has been implemented on an industrial robot-the CRS Robotics A460. Experiments are conducted to investigate the learning and generalization ability of neural networks in complementing the PID method in robot trajectory tracking. The results of this work suggest that neural networks could be added to existing PID-controlled industrial robots for performance improvement.","PeriodicalId":269440,"journal":{"name":"Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126565923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Development of integrated GPS positioning and navigation systems 发展GPS综合定位导航系统
Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering Pub Date : 1996-05-26 DOI: 10.1109/CCECE.1996.548305
Yang Gao, J. Mclellan
{"title":"Development of integrated GPS positioning and navigation systems","authors":"Yang Gao, J. Mclellan","doi":"10.1109/CCECE.1996.548305","DOIUrl":"https://doi.org/10.1109/CCECE.1996.548305","url":null,"abstract":"Presented in this paper are several products developed by Pulsearch for high precision positioning and navigation including systems for wide area differential GPS (WADGPS), seismic surveying and precision farming. System architectures are described for each product focusing on integration strategy and performance.","PeriodicalId":269440,"journal":{"name":"Proceedings of 1996 Canadian Conference on Electrical and Computer Engineering","volume":"189 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126659676","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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