ATM switch design requirements under FEC environment

Abstract

ATM relies on very low error rate fiber-optic cables for cell transport. Very soon, ATM will be used over wireless and satellite channels. These upcoming channels will add noise which contribute to cell loss besides congestion. Time-sensitive (delay-critical) applications suffer the most due to cell loss. This imposes more resources to be allocated which might be costly and not desired. Automatic repeat request (ARQ) and forward error correction (FEC) schemes are proposed as alternatives to overcome congestion or reduce its effect. FEC is more advantageous since it potentially requires less resources to be allocated and hence simpler ATM switch design. Hardware requirements such as buffer size are even less than with conventional ATM switches. Two ATM switch designs are discussed; one is suitable for wireless communications and the other is suitable for time-sensitive data.