2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines最新文献_第2页

Kung Fu Data Energy - Minimizing Communication Energy in FPGA Computations 功夫数据能量-最小化FPGA计算中的通信能量

2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines Pub Date : 2014-05-11 DOI: 10.1109/FCCM.2014.66

E. Kadrić, K. Mahajan, A. DeHon

引用次数: 11

A Fully Pipelined and Dynamically Composable Architecture of CGRA 全流水线、动态可组合的CGRA体系结构

2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines Pub Date : 2014-05-11 DOI: 10.1109/FCCM.2014.12

J. Cong, Hui Huang, Chiyuan Ma, Bingjun Xiao, Peipei Zhou

{"title":"A Fully Pipelined and Dynamically Composable Architecture of CGRA","authors":"J. Cong, Hui Huang, Chiyuan Ma, Bingjun Xiao, Peipei Zhou","doi":"10.1109/FCCM.2014.12","DOIUrl":"https://doi.org/10.1109/FCCM.2014.12","url":null,"abstract":"Future processor chips will not be limited by the transistor resources, but will be mainly constrained by energy efficiency. Reconfigurable fabrics bring higher energy efficiency than CPUs via customized hardware that adapts to user applications. Among different reconfigurable fabrics, coarse-grained reconfigurable arrays (CGRAs) can be even more efficient than fine-grained FPGAs when bit-level customization is not necessary in target applications. CGRAs were originally developed in the era when transistor resources were more critical than energy efficiency. Previous work shares hardware among different operations via modulo scheduling and time multiplexing of processing elements. In this work, we focus on an emerging scenario where transistor resources are rich. We develop a novel CGRA architecture that enables full pipelining and dynamic composition to improve energy efficiency by taking full advantage of abundant transistors. Several new design challenges are solved. We implement a prototype of the proposed architecture in a commodity FPGA chip for verification. Experiments show that our architecture can fully exploit the energy benefits of customization for user applications in the scenario of rich transistor resources.","PeriodicalId":246162,"journal":{"name":"2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125208214","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 73

Fast, Power-Efficient Biophotonic Simulations for Cancer Treatment Using FPGAs 利用fpga快速、高效的生物光子模拟癌症治疗

2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines Pub Date : 2014-05-11 DOI: 10.1109/FCCM.2014.45

Jeffrey Cassidy, L. Lilge, Vaughn Betz

{"title":"Fast, Power-Efficient Biophotonic Simulations for Cancer Treatment Using FPGAs","authors":"Jeffrey Cassidy, L. Lilge, Vaughn Betz","doi":"10.1109/FCCM.2014.45","DOIUrl":"https://doi.org/10.1109/FCCM.2014.45","url":null,"abstract":"Biophotonics, the study of light propagation through living tissue, is important for many medical applications ranging from imaging and detection through therapy for conditions such as cancer. Effective medical use of light depends on simulating its propagation through highly-scattering tissue. Monte Carlo simulation of photon migration has been adopted as the “gold standard” for its ability to capture complicated geometries and model all of the relevant problem physics. This accuracy and generality comes at a high computational cost, which limits the technique's utility. Greatly generalizing previous work, we present the first and only hardware-accelerated Monte Carlo biophotonic simulator that can accept complicated geometries described by tetrahedral meshes. Implemented on an Altera Stratix V FPGA, it achieves high performance (4x) and extremely high energy efficiency (67x) compared to a tightly-optimized multi-threaded CPU implementation, with demonstrated potential to expand the performance gains even further to 15-20x, which would enable important clinical and research applications.","PeriodicalId":246162,"journal":{"name":"2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124334833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Compiling Higher Order Functional Programs to Composable Digital Hardware 编译高阶函数程序到可组合的数字硬件

2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines Pub Date : 2014-05-11 DOI: 10.1109/FCCM.2014.69

E. Aguilar-Pelaez, Samuel Bayliss, Alex I. Smith, F. Winterstein, D. Ghica, David B. Thomas, G. Constantinides

引用次数: 2

A New Algorithm for Carry-Free Addition of Binary Signed-Digit Numbers 二进制有符号数字的无携带加法新算法

2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines Pub Date : 2014-05-11 DOI: 10.1109/FCCM.2014.24

K. Schneider, Adrian Willenbücher

{"title":"A New Algorithm for Carry-Free Addition of Binary Signed-Digit Numbers","authors":"K. Schneider, Adrian Willenbücher","doi":"10.1109/FCCM.2014.24","DOIUrl":"https://doi.org/10.1109/FCCM.2014.24","url":null,"abstract":"Signed-digit (SD) numbers generalize traditional radix numbers by allowing negative digits within a certain range. Typically, this leads to redundant number representations that can be used to avoid the carry propagation problem of addition of radix numbers. Unfortunately, as proved by Avizienis, the standard algorithm for carry-free addition of SD numbers does not work for the binary case. In this paper, we therefore construct a special algorithm for the carry-free addition and subtraction of binary SD numbers, i.e., addition and subtraction of n-digit numbers are performed with circuits of depth O(1) and size O(n). This is possible by computing in addition to the transfer digits used by the standard algorithm one additional bit that allows us to distinguish relevant cases to avoid propagation of dependencies. The additional bit and the transfer digit used to compute the sum digit at position i depend only on the summands' digits at positions i and i - 1 so that all sum digits can be computed with a hardware circuit of a depth that is independent of the number of digits. We first explain the basics of the standard addition algorithm to derive the additional information needed to fix the algorithm for the binary case. After proving the correctness of our algorithm, we present experimental results that show that our implementation clearly outperforms two's complement addition even for small numbers, and saves 50% of the required chip area compared to other carry-free implementations.","PeriodicalId":246162,"journal":{"name":"2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116557388","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Experiments in Mapping Expressions to DSP Blocks 将表达式映射到DSP块的实验

2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines Pub Date : 2014-05-11 DOI: 10.1109/FCCM.2014.34

Bajaj Ronak, Suhaib A. Fahmy

引用次数: 2

FPGA Implementation of EM Algorithm for 3D CT Reconstruction 三维CT重建中EM算法的FPGA实现

2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines Pub Date : 2014-05-11 DOI: 10.1109/FCCM.2014.48

Young-kyu Choi, J. Cong, Di Wu

引用次数: 9

Mapping Tasks to a Dynamically Reconfigurable Coarse Grained Array 将任务映射到动态可重构的粗粒度数组

2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines Pub Date : 2014-05-11 DOI: 10.1109/FCCM.2014.20

M. S. Moghaddam, K. Paul, M. Balakrishnan

引用次数: 0

GraphGen: An FPGA Framework for Vertex-Centric Graph Computation GraphGen:一个以顶点为中心的图形计算的FPGA框架

2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines Pub Date : 2014-05-11 DOI: 10.1109/FCCM.2014.15

E. Nurvitadhi, G. Weisz, Yu Wang, Skand Hurkat, Marie Nguyen, J. Hoe, José F. Martínez, Carlos Guestrin

引用次数: 115

Building Optimized Packet Filters with COFFi 用COFFi构建优化包过滤器

2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines Pub Date : 2014-05-11 DOI: 10.1109/FCCM.2014.38

Sven Hager, F. Winkler, B. Scheuermann, Klaus Reinhardt

引用次数: 1