Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC最新文献_第4页

Gate-delay fault test with conventional scan-design 采用常规扫描设计进行门延迟故障测试

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC Pub Date : 1994-02-28 DOI: 10.1109/EDTC.1994.326825

A. Kunzmann, Frank Böhland

引用次数: 1

Multilevel logic synthesis of very high complexity circuits 非常高复杂度电路的多电平逻辑合成

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC Pub Date : 1994-02-28 DOI: 10.1109/EDTC.1994.326795

L. Burgun, N. Dictus, A. Greiner, E. Pradho, C. Sarwary

引用次数: 0

A new BIST approach for delay fault testing 时延故障检测的一种新方法

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC Pub Date : 1994-02-28 DOI: 10.1109/EDTC.1994.326863

A. Vuksic, K. Fuchs

引用次数: 28

Cell height driven transistor sizing in a cell based module design 在基于单元的模块设计中，单元高度驱动晶体管尺寸

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC Pub Date : 1994-02-28 DOI: 10.1109/EDTC.1994.326841

How-Rern Lin, Ching-Lung Chou, Y. Hsu, TingTing Hwang

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引用次数: 2

A hierarchical approach to fault collapsing 断层塌陷的分层方法

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC Pub Date : 1994-02-28 DOI: 10.1109/EDTC.1994.326880

R. Hahn, Rolf Krieger, B. Becker

引用次数: 23

Boolean manipulation with free BDD's. First experimental results 使用自由BDD的布尔操作。第一个实验结果

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC Pub Date : 1994-02-28 DOI: 10.1109/EDTC.1994.326915

J. Bern, Jordan Gergov, C. Meinel, A. Slobodová

引用次数: 24

Maximizing the throughput of high performance DSP applications using behavioral transformations 使用行为转换最大化高性能DSP应用程序的吞吐量

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC Pub Date : 1994-02-28 DOI: 10.1109/EDTC.1994.326903

Shan-Hsi Huang, J. Rabaey

引用次数: 28

Flow management requirements of a test harness for testing the reliability of an electronic CAD system 用于测试电子CAD系统可靠性的测试线束的流程管理要求

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC Pub Date : 1994-02-28 DOI: 10.1109/EDTC.1994.326919

Gunnar Bartels, P. M. Kist, Kees Schot, M. Sim

引用次数: 2

Self testable boards with standard IEEE 1149.5 module test and maintenance (MTM) bus interface 具有标准IEEE 1149.5模块测试和维护(MTM)总线接口的自检板

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC Pub Date : 1994-02-28 DOI: 10.1109/EDTC.1994.326874

O. Haberl, T. Kropf

引用次数: 14

A genetic algorithm for the Steiner Problem in a graph 图中Steiner问题的遗传算法

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC Pub Date : 1994-02-28 DOI: 10.1109/EDTC.1994.326845

H. Esbensen, P. Mazumder

引用次数: 19