{"title":"图中Steiner问题的遗传算法","authors":"H. Esbensen, P. Mazumder","doi":"10.1109/EDTC.1994.326845","DOIUrl":null,"url":null,"abstract":"A genetic algorithm (GA) for the Steiner Problem in a graph (SPG) is presented, and its application to global routing of VLSI layouts discussed. In this context the GA's capability to provide several distinct high-quality solutions to a given problem is very advantageous. The performance of the algorithm is compared to that of two heuristics from the literature. The GA is clearly superior in terms of result quality while also being competitive with respect to runtime.<<ETX>>","PeriodicalId":244297,"journal":{"name":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"A genetic algorithm for the Steiner Problem in a graph\",\"authors\":\"H. Esbensen, P. Mazumder\",\"doi\":\"10.1109/EDTC.1994.326845\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A genetic algorithm (GA) for the Steiner Problem in a graph (SPG) is presented, and its application to global routing of VLSI layouts discussed. In this context the GA's capability to provide several distinct high-quality solutions to a given problem is very advantageous. The performance of the algorithm is compared to that of two heuristics from the literature. The GA is clearly superior in terms of result quality while also being competitive with respect to runtime.<<ETX>>\",\"PeriodicalId\":244297,\"journal\":{\"name\":\"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-02-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDTC.1994.326845\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDTC.1994.326845","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A genetic algorithm for the Steiner Problem in a graph
A genetic algorithm (GA) for the Steiner Problem in a graph (SPG) is presented, and its application to global routing of VLSI layouts discussed. In this context the GA's capability to provide several distinct high-quality solutions to a given problem is very advantageous. The performance of the algorithm is compared to that of two heuristics from the literature. The GA is clearly superior in terms of result quality while also being competitive with respect to runtime.<>
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