Hyungtae Kim, Geonho Kim, Li Yunrong, Ji-hyeok Jeong, Youngdae Kim
{"title":"SRAM Bitcell Defect Identification Methodology Using Electrical Failure Analysis Data","authors":"Hyungtae Kim, Geonho Kim, Li Yunrong, Ji-hyeok Jeong, Youngdae Kim","doi":"10.31399/ASM.CP.ISTFA2020P0322","DOIUrl":"https://doi.org/10.31399/ASM.CP.ISTFA2020P0322","url":null,"abstract":"\u0000 Static Random Access Memory (SRAM) has long been used for a new technology development vehicle because it is sensitive to process defects due to its high density and minimum feature size. In addition, failure location can be accurately predicted because of the highly structured architecture. Thus, fast and accurate Failure Analysis (FA) of the SRAM failure is crucial for the success of new technology learning and development. It is often quite time consuming to identify defects through conventional physical failure analysis techniques. In this paper, we present an advanced defect identification methodology for SRAM bitcell failures with fast speed and high accuracy based on the bitcell transistor analog characteristics from special design for test (DFT) features, Direct Bitcell Access (DBA). This technique has the advantage to shorten FA throughput time due to a time efficient test method and an intuitive failure analysis method based on Electrical Failure Analysis (EFA) without destructive analysis. In addition, all the defects in a wafer can be analyzed and improved simultaneously utilizing the proposed defect identification methodology. Some successful case studies are also discussed to demonstrate the efficiency of the proposed defect identification methodology.","PeriodicalId":238558,"journal":{"name":"ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127261418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Publication Note","authors":"","doi":"10.31399/asm.cp.istfa2020fm02","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2020fm02","url":null,"abstract":"\u0000 The papers in this volume are based on presentations accepted for the 46th International Symposium for Testing and Failure Analysis, ISTFA 2020, that was scheduled to be held from November 15 to 19, 2020, in Pasadena, California, USA. The conference was cancelled due to the coronavirus (COVID-19) pandemic.","PeriodicalId":238558,"journal":{"name":"ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121805223","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Back Side Illumination Image Sensor Characterization by Backside Circuit Editing","authors":"Jian Yu, Jin Xu, Niel Sanico","doi":"10.31399/ASM.CP.ISTFA2020P0129","DOIUrl":"https://doi.org/10.31399/ASM.CP.ISTFA2020P0129","url":null,"abstract":"\u0000 The characterization of Back Side Illumination (BSI) Image Sensor is challenging because of its unique construct with silicon on top. A novel approach for the BSI Image sensor characterization will be presented in this paper. The proposed approach utilizes the circuit editing through the silicon (backside) by ion beam and optical imaging. This technique allows access to the buried conductors and creates probe points for measurements, which are typically performed by an optical prober, electron beam prober or a mechanical micro/nano prober.","PeriodicalId":238558,"journal":{"name":"ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132589714","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Failure Case Studies of GaAs-Based Oxide-Confined VCSELs","authors":"Kuang-Tse Ho, Ching-Hsiang Chan","doi":"10.31399/ASM.CP.ISTFA2020P0317","DOIUrl":"https://doi.org/10.31399/ASM.CP.ISTFA2020P0317","url":null,"abstract":"\u0000 This research summarizes a variety of physical failure modes of GaAs-based oxide-confined VCSELs and their root causes. Standard failure analysis procedure, which includes defect fault isolation by PEM or IR-OBIRCH and physical inspection by TEM analysis are also presented in detail.","PeriodicalId":238558,"journal":{"name":"ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129929069","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}