{"title":"System-Level Time-Domain Behavioral Modeling for A Mobile WiMax Transceiver","authors":"Jie He, Jun Seok Yang, Yongsup Kim, A. Kim","doi":"10.1109/BMAS.2006.283484","DOIUrl":"https://doi.org/10.1109/BMAS.2006.283484","url":null,"abstract":"The time-domain baseband equivalent model for a mobile WiMax, IEEE 802.16e RF transceiver has been addressed in this paper. The baseband equivalent model is built up based on complex signals and spectrum. Nonlinearity up to the fifth order harmonics is considered, and noise characteristics are modeled in time domain for amplifiers and mixers. The time-domain phase noise is also implemented as part of PLL-based local oscillators. The non-ideal parameters, DNL and INL, are defined to describe non-linearity of ADC and DAC. With this behavioral models implemented on Matlab/Simulink environment, the performance of a complete mobile WiMax transceiver can be evaluated and predicted before an actual hardware design","PeriodicalId":235383,"journal":{"name":"2006 IEEE International Behavioral Modeling and Simulation Workshop","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124329942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Simulation of Power Grid Networks Considering Wires and Lognormal Leakage Current Variations","authors":"N. Mi, Jeffrey Fan, Sheldon X.-D. Tan","doi":"10.1109/BMAS.2006.283473","DOIUrl":"https://doi.org/10.1109/BMAS.2006.283473","url":null,"abstract":"As the technology scales into 90 nm and below, process-induced variations become more pronounced. In this paper, we propose an efficient stochastic method for analyzing the voltage drop variations of on-chip power grid networks, considering both wire and log-normal leakage current variations. The new analysis is based on the Hermite polynomial chaos (PC) representation of random processes. Different from the existing Hermite PC based method for power grid analysis, which considers only wire variations and model all the random variations as Gaussian processes. The new method considers both wire variations and leakage current variations. We model the variational sub-threshold leakage currents as log-normal distribution random variables. Our experiment results show that the new method is more accurate than the Gaussian-only Hermite PC method using the Taylor expansion method for analyzing leakage current variations, and two orders of magnitude faster than the Monte Carlo method with small variance errors","PeriodicalId":235383,"journal":{"name":"2006 IEEE International Behavioral Modeling and Simulation Workshop","volume":"12 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134299147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Expected Performance Centering for Analog/RF Designs","authors":"Bao Liu, A. Kahng","doi":"10.1109/BMAS.2006.283482","DOIUrl":"https://doi.org/10.1109/BMAS.2006.283482","url":null,"abstract":"We unite the conventional analog/RF design objectives such as design centering and performance targeting and propose a generalized analog/RF design objective. We propose expected performance centering, i.e., to maximize the expected performance margin of a circuit under process and environmental variations for topology selection with performance specification in a hierarchical design. We develop three methods to compute expected performance margin. Our experimental results show improved expected performance margin achieved by the proposed expected performance centering technique","PeriodicalId":235383,"journal":{"name":"2006 IEEE International Behavioral Modeling and Simulation Workshop","volume":"53 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134530867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Weisheng Zhao, E. Belhaire, Q. Mistral, C. Chappert, V. Javerliac, Bernard Dieny, E. Nicolle
{"title":"Macro-model of Spin-Transfer Torque based Magnetic Tunnel Junction device for hybrid Magnetic-CMOS design","authors":"Weisheng Zhao, E. Belhaire, Q. Mistral, C. Chappert, V. Javerliac, Bernard Dieny, E. Nicolle","doi":"10.1109/BMAS.2006.283467","DOIUrl":"https://doi.org/10.1109/BMAS.2006.283467","url":null,"abstract":"The development of hybrid magnetic-CMOS circuits such as MRAM (magnetic RAM) and magnetic logic circuit requires efficient simulation models for the magnetic devices. A macro-model of magnetic tunnel junction (MTJ) is presented in this paper. This device is the most commonly used magnetic components in CMOS circuits. This model is based on spin-transfer torque (STT) writing approach. This very promising approach should constitute the second generation of MRAM switching technology; it features small switching current (~120uA) and high programming speed (<1ns). The macro-model has been developed in Verilog-A language and implemented on Cadence Virtuoso platform with Spectre 5.0.32 simulator. Many experimental parameters are integrated in this model to improve the simulation accuracy. So, the model can efficiently be used to design hybrid magnetic CMOS circuits","PeriodicalId":235383,"journal":{"name":"2006 IEEE International Behavioral Modeling and Simulation Workshop","volume":"12 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114114691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Mixed-Signals Design Automation using the MIX-SYN Framework","authors":"E. Liao, A. Postula","doi":"10.1109/BMAS.2006.283478","DOIUrl":"https://doi.org/10.1109/BMAS.2006.283478","url":null,"abstract":"This paper demonstrates how the MIX-SYN framework can fast-track the design of analogue and mixed-signals integrated circuits, traditionally designed using time-consuming techniques. By integrating different levels of design abstraction and their simulation environments, MIX-SYN aims to bridge the existing design discontinuity of transferring algorithm to functional design. It does not perform general analogue synthesis, but uses a mix of knowledge-based and analytic-based approaches to help the designer rapidly explore the design space and arrive at a circuit solution","PeriodicalId":235383,"journal":{"name":"2006 IEEE International Behavioral Modeling and Simulation Workshop","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124262755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Mixed Modeling of a SAW Delay Line using VHDL","authors":"W. Wilson, G. Atkinson","doi":"10.1109/BMAS.2006.283466","DOIUrl":"https://doi.org/10.1109/BMAS.2006.283466","url":null,"abstract":"To aid in the development of SAW sensors for aerospace applications we have created a model of a SAW delay line using VHDL. The model implements the impulse response method to calculate the frequency response, impedance, and insertion loss. The model includes optimization for the number of finger pairs in the IDTs and for the aperture height. This paper presents the model and the results from the model for a SAW delay line design","PeriodicalId":235383,"journal":{"name":"2006 IEEE International Behavioral Modeling and Simulation Workshop","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116022273","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}