Expected Performance Centering for Analog/RF Designs

Abstract

We unite the conventional analog/RF design objectives such as design centering and performance targeting and propose a generalized analog/RF design objective. We propose expected performance centering, i.e., to maximize the expected performance margin of a circuit under process and environmental variations for topology selection with performance specification in a hierarchical design. We develop three methods to compute expected performance margin. Our experimental results show improved expected performance margin achieved by the proposed expected performance centering technique