2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum最新文献

筛选
英文 中文
MapReducing GEPETO or Towards Conducting a Privacy Analysis on Millions of Mobility Traces mapreduce GEPETO或对数百万移动痕迹进行隐私分析
S. Gambs, M. Killijian, Izabela Moise, Miguel Núñez del Prado Cortez
{"title":"MapReducing GEPETO or Towards Conducting a Privacy Analysis on Millions of Mobility Traces","authors":"S. Gambs, M. Killijian, Izabela Moise, Miguel Núñez del Prado Cortez","doi":"10.1109/IPDPSW.2013.180","DOIUrl":"https://doi.org/10.1109/IPDPSW.2013.180","url":null,"abstract":"GEPETO (for GEoPrivacy-Enhancing Toolkit) is a flexible software that can be used to visualize, sanitize, perform inference attacks and measure the utility of a particular geolocated dataset. The main objective of GEPETO is to enable a data curator (e.g., a company, a governmental agency or a data protection authority) to design, tune, experiment and evaluate various sanitization algorithms and inference attacks as well as visualizing the following results and evaluating the resulting trade-off between privacy and utility. In this paper, we propose to adopt the MapReduce paradigm in order to be able to perform a privacy analysis on large scale geolocated datasets composed of millions of mobility traces. More precisely, we design and implement a complete MapReduce-based approach to GEPETO. Most of the algorithms used to conduct an inference attack (such as sampling, kMeans and DJ-Cluster) represent good candidates to be abstracted in the MapReduce formalism. These algorithms have been implemented with Hadoop and evaluated on a real dataset. Preliminary results show that the MapReduced versions of the algorithms can efficiently handle millions of mobility traces.","PeriodicalId":234552,"journal":{"name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126136306","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Issues in Communication Heterogeneity for Message-Passing Concurrent Computing 消息传递并发计算中的通信异构问题
Jaroslaw Slawinski, U. Villa, T. Passerini, A. Veneziani, V. Sunderam
{"title":"Issues in Communication Heterogeneity for Message-Passing Concurrent Computing","authors":"Jaroslaw Slawinski, U. Villa, T. Passerini, A. Veneziani, V. Sunderam","doi":"10.1109/IPDPSW.2013.140","DOIUrl":"https://doi.org/10.1109/IPDPSW.2013.140","url":null,"abstract":"Heterogeneity in interconnection network throughput and latency has recently become a major issue for parallel computing applications. With the universal prevalence of multicore processors, large scale clusters and, most critically, cloud platforms, variations in communication characteristics of orders of magnitude are possible within a single execution environment. When applications also exhibit heterogeneity and irregularity in their communication patterns, process placement can make the difference between good and unacceptable performance. We discuss techniques for analyzing and addressing these factors in the context of a computational fluid dynamics application for the study of blood flow, on typical parallel platforms: a local parallel machine, a workstation network, and IaaS cloud-based cluster. Our experiences show problem sizes and platform sizes for which communication variations have significant impact, and suggest methods for process mapping that are likely to alleviate the detrimental effects of communication heterogeneity in different environments.","PeriodicalId":234552,"journal":{"name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124353289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Architecture Exploration of High-Performance Floating-Point Fused Multiply-Add Units and their Automatic Use in High-Level Synthesis 高性能浮点融合乘加单元的体系结构探索及其在高级综合中的自动应用
B. Liebig, Jens Huthmann, A. Koch
{"title":"Architecture Exploration of High-Performance Floating-Point Fused Multiply-Add Units and their Automatic Use in High-Level Synthesis","authors":"B. Liebig, Jens Huthmann, A. Koch","doi":"10.1109/IPDPSW.2013.106","DOIUrl":"https://doi.org/10.1109/IPDPSW.2013.106","url":null,"abstract":"Multiply-add operations form a crucial part of many digital signal processing and control engineering applications. Since their performance is crucial for the application-level speed-up, it is worthwhile to explore a wide spectrum of implementations alternatives, trading increased area/energy usage to speed-up units on the critical path of the computation. This paper examines existing solutions and proposes two new architectures for floating-point fused multiply-adds, and also considers the impact of different in-fabric features of recent FPGA architectures. The units rely on different degrees of carry-save arithmetic improve performance by up to 2.5x over the closest state-of-the-art competitor. They are evaluated at the application level by modifying an existing high-level synthesis system to automatically insert the new units for computations on the critical path of three different convex solvers.","PeriodicalId":234552,"journal":{"name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122504090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
LiPS: A Cost-Efficient Data and Task Co-Scheduler for MapReduce LiPS:一个用于MapReduce的经济高效的数据和任务协同调度程序
M. Ehsan, R. Sion
{"title":"LiPS: A Cost-Efficient Data and Task Co-Scheduler for MapReduce","authors":"M. Ehsan, R. Sion","doi":"10.1109/IPDPSW.2013.175","DOIUrl":"https://doi.org/10.1109/IPDPSW.2013.175","url":null,"abstract":"We introduce LiPS, a new cost-efficient data and task co-scheduler for MapReduce in a cloud environment. LiPS allows flexible control of job make spans, multi-resource management, and fairness. By using linear programming to simultaneously co-schedule data and tasks, LiPS helps to achieve minimized dollar cost globally. We evaluated LiPS both analytically and on Amazon EC2 in order to measure actual dollar charges. The results were significant; LiPS saved 58-79% of the dollar costs when compared with the Hadoop default scheduler, while also allowing users to fine-tune the cost-performance tradeoff.","PeriodicalId":234552,"journal":{"name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131825682","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
The Pheet Task-Scheduling Framework on the Intel® Xeon Phi Coprocessor and other Multicore Architectures 基于Intel®Xeon Phi协处理器和其他多核架构的工作表任务调度框架
Martin Wimmer, Manuel Pöter, J. Träff
{"title":"The Pheet Task-Scheduling Framework on the Intel® Xeon Phi Coprocessor and other Multicore Architectures","authors":"Martin Wimmer, Manuel Pöter, J. Träff","doi":"10.1109/IPDPSW.2013.22","DOIUrl":"https://doi.org/10.1109/IPDPSW.2013.22","url":null,"abstract":"Pheet, a task-scheduling framework that allows for easy customization of internal data-structures, is a research vehicle for experimenting with high-level application and low-level architectural support for task-parallel programming models. Pheet is highly configurable, and allows comparison between different implementations of data structures used in the scheduler, as well as comparisons between entirely different schedulers (typically using work-stealing). Pheet is being used to investigate high-level task-parallel support mechanisms that allow applications to influence scheduling decisions and behavior. One such mechanism, that we use in this work, is scheduling strategies. Previous Pheet benchmarking was done on conventional multicore architectures from AMD and Intel. In this paper we discuss the performance of Pheet on a prototype Intel Xeon Phi coprocessor with 61 cores. We compare these results to Pheet on three conventional multicore architectures. Using two benchmarks from the mostly non-numerical/combinatorial Pheet suite we find that the Xeon Phi coprocessor provides considerably better scalability than the other architectures, with more than a 70x speedup on the 61-core Knights Corner prototype system when using 4-way SMT, although not achieving the same absolute performance. For our research, the Xeon Phi coprocessor is an interesting architecture for implementing and evaluating fine-grained task-parallel parallel algorithm implementations.","PeriodicalId":234552,"journal":{"name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","volume":"242 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124673792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Teaching Concurrent and Distributed Computing -- Initiatives in Rio de Janeiro 并行和分布式计算教学——里约热内卢的倡议
Adriano Branco, A. Moura, N. Rodriguez, Silvana Rossetto
{"title":"Teaching Concurrent and Distributed Computing -- Initiatives in Rio de Janeiro","authors":"Adriano Branco, A. Moura, N. Rodriguez, Silvana Rossetto","doi":"10.1109/IPDPSW.2013.33","DOIUrl":"https://doi.org/10.1109/IPDPSW.2013.33","url":null,"abstract":"In this paper we describe two ongoing initiatives for teaching concurrency and distribution in PUC-Rio and UFRJ. One of them is a new approach for teaching distributed systems. Conventional distributed system courses follow a syllabus in which a list of topics is discussed independently and at different levels of abstractions. In Edupar'2012, we proposed a course with a novel approach, using a wireless sensor network environment to pin all topics down to concrete applications and to maintain issues such as fault tolerance and coordination continuously present. The second initiative is a smaller one, in which we insert a new topic in a Systems Software course to allow students to have a better understanding of what is application-level multitasking and of how it can be implemented. In this paper, we report on the experience of teaching the proposed syllabus and the adjustments that were necessary. We also discuss some plans for the courses in 2013.","PeriodicalId":234552,"journal":{"name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115067641","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Efficient Parallel and Distributed Algorithms for GIS Polygonal Overlay Processing GIS多边形叠加处理的高效并行与分布式算法
S. Puri, S. Prasad
{"title":"Efficient Parallel and Distributed Algorithms for GIS Polygonal Overlay Processing","authors":"S. Puri, S. Prasad","doi":"10.1109/IPDPSW.2013.174","DOIUrl":"https://doi.org/10.1109/IPDPSW.2013.174","url":null,"abstract":"Polygon overlay is one of the complex operations in Geographic Information Systems (GIS). In GIS, a typical polygon tends to be large in size often consisting of thousands of vertices. Sequential algorithms for this problem are in abundance in literature and most of the parallel algorithms concentrate on parallelizing edge intersection phase only. Our research aims to develop parallel algorithms to find overlay for two input polygons which can be extended to handle multiple polygons and implement it on General Purpose Graphics Processing Units (GPGPU) which offers massive parallelism at relatively low cost. Moreover, spatial data files tend to be large in size (in GBs) and the underlying overlay computation is highly irregular and compute intensive. MapReduce paradigm is now standard in industry and academia for processing large-scale data. Motivated by MapReduce programming model, we propose to develop and implement scalable distributed algorithms to solve large-scale overlay processing in this dissertation.","PeriodicalId":234552,"journal":{"name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133906121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
Towards Memory-Load Balanced Fast Fourier Transformations in Fine-Grain Execution Models 在细粒度执行模型中实现内存负载平衡的快速傅立叶变换
Cheng Chen, Yao Wu, Stéphane Zuckerman, G. Gao
{"title":"Towards Memory-Load Balanced Fast Fourier Transformations in Fine-Grain Execution Models","authors":"Cheng Chen, Yao Wu, Stéphane Zuckerman, G. Gao","doi":"10.1109/IPDPSW.2013.47","DOIUrl":"https://doi.org/10.1109/IPDPSW.2013.47","url":null,"abstract":"The code let model is a fine-grain dataflow-inspired program execution model that balances the parallelism and overhead of the runtime system. It plays an important role in terms of performance, scalability, and energy efficiency in exascale studies such as the DARPA UHPC project and the DOE X-Stack project. As an important application, the Fast Fourier Transform (FFT) has been deeply studied in fine-grain models, including the code let model. However, the existing work focuses on how fine-grain models achieve more balanced workload comparing to traditional coarse-grain models. In this paper, we make an important observation that the flexibility of execution order of tasks in fine-grain models improves utilization of memory bandwidth as well. We use the code let model and the FFT application as a case study to show that a proper execution order of tasks (or code lets) can significantly reduce memory contention and thus improve performance. We propose an algorithm that provides a heuristic guidance of the execution order of the code lets to reduce memory contention. We implemented our algorithm on the IBM Cyclops-64 architecture. Experimental results show that our algorithm improves up to 46% performance compared to a state-of-the-art coarse-grain implementation of the FFT application on Cyclops-64.","PeriodicalId":234552,"journal":{"name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133184602","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Optimal Peer Selection Strategy in P2P-VoD Systems Using Dynamic Evolution Strategy 基于动态进化策略的P2P-VoD系统最优同伴选择策略
Thibaud Rohmer, A. Nakib, A. Nafaa
{"title":"Optimal Peer Selection Strategy in P2P-VoD Systems Using Dynamic Evolution Strategy","authors":"Thibaud Rohmer, A. Nakib, A. Nafaa","doi":"10.1109/IPDPSW.2013.92","DOIUrl":"https://doi.org/10.1109/IPDPSW.2013.92","url":null,"abstract":"Peer-to-Peer Video-on-Demand (VoD) systems are rising as a new dominant way to distribute video content over IP networks. Although this approach improves the overall VoD system scalability, it still poses new challenges such as peers resource allocation. There has been numerous research works versed into the P2P streaming with different focus areas, and different approaches. Some work cover the resource allocation issue in P2P streaming systems where the real-time streaming add another dimension to the problem. Most work on P2P resource allocation approaches the problem with static rules strategies that fail to dynamically adjust in face of changing content demand (popularity) trends. In this paper, we focus on the problem of enhancing the performances of a P2P system by adapting the peer allocation strategy. The proposed resource allocation system dynamically switches between multiple strategies to optimally respond to observed and predicted shifts in the content popularity. To do so, a dynamic estimation problem is solved using a Levy distribution based Dynamic Evolution Strategy algorithm. The obtained results show that using a dynamic resource allocation reduces the rejection rate while maintaining high diversification in the face of a dynamically changing title demand.","PeriodicalId":234552,"journal":{"name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134474174","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Analyzing Optimization Techniques for Power Efficiency on Heterogeneous Platforms 异构平台电源效率优化技术分析
Yash Ukidave, D. Kaeli
{"title":"Analyzing Optimization Techniques for Power Efficiency on Heterogeneous Platforms","authors":"Yash Ukidave, D. Kaeli","doi":"10.1109/IPDPSW.2013.220","DOIUrl":"https://doi.org/10.1109/IPDPSW.2013.220","url":null,"abstract":"Graphics processing units (GPUs) have become widely accepted as the computing platform of choice in many high performance computing domains. The availability of programming standards such as OpenCL are used to leverage the inherent parallelism offered by GPUs. Source code optimizations such as loop unrolling and tiling when targeted to heterogeneous applications have reported large gains in performance. However, given the power consumption of GPUs, platforms can exhaust their power budgets quickly. Better solutions are needed to effectively exploit the power-efficiency available on heterogeneous systems. In this work, we evaluate the power/performance efficiency of different optimizations used on heterogeneous applications. We analyze the power/performance trade-off by evaluating energy consumption of the optimizations. We compare the performance of different optimization techniques on 4 different Fast Fourier Transform implementations. Our study covers discrete GPUs and shared memory GPUs (APUs), and includes hardware from AMD (Llano APUs and the Southern Islands GPU), Nvidia (Kepler) and Intel (Ivy Bridge) as test platforms. The study identifies the architectural and algorithmic factors which can most impact power consumption. We explore arange of application optimizations which show an increase in power consumption by 27%, but result in more than a 1.8Xspeedup in performance. We observe a 11% variation in energy consumption among different optimizations. We highlight how different optimizations can improve the execution performance of a heterogeneous application, but also impact power efficiency of the application.","PeriodicalId":234552,"journal":{"name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134368584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信