T. Kaieda, P. Kladitis, G. Kading, L. Brott, F. D. Allen, J. Parish
{"title":"Protein impregnated polymer film infrared sensor using suspended microelectromechanical systems pixels","authors":"T. Kaieda, P. Kladitis, G. Kading, L. Brott, F. D. Allen, J. Parish","doi":"10.1109/mwscas.2005.1594344","DOIUrl":"https://doi.org/10.1109/mwscas.2005.1594344","url":null,"abstract":"Large pixel areas with thick film suspensions on a solid substrate have been shown to change resistivity when measured at different substrate temperatures. Microsized pixel areas with thinner suspensions on a thermally isolating silicon micromachined structure have demonstrated the same decrease in resistivity when exposed to infrared radiation","PeriodicalId":231135,"journal":{"name":"48th Midwest Symposium on Circuits and Systems, 2005.","volume":"13 43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130863785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new phase-locked loop with high speed phase frequency detector","authors":"Hwang-Cherng Chow, N.-L. Yeh","doi":"10.1109/MWSCAS.2005.1594358","DOIUrl":"https://doi.org/10.1109/MWSCAS.2005.1594358","url":null,"abstract":"In this paper, we first systematically analyze existing phase frequency detectors from aspects of theoretical analysis and circuit operation. Based on the circuit architecture, both classifications and comparisons are made. Then we propose a high speed phase frequency detector for PLL design. The proposed phase frequency detector is simple in its structure and has no glitch output as well as better phase characteristics. Furthermore, some simulations results by HSPICE are performed based on 0.35 mum process parameters. Several prior art phase frequency detectors with the proposed one are compared for phase sensitivity, dead zone characteristics and maximum operation frequency. Based on simulation results, the proposed phase frequency detector shows satisfactory circuit performance with higher operation frequency, lower phase jitter and smaller circuit complexity. The speed of the proposed phase frequency detector is up to 3.5GHz. Moreover, the circuit design of a GHz PLL has been completed including high speed VCO, charge pump and phase frequency detector with an external loop filter. The total layout size excluding pads is 216.3mum times 47.85mum. The post-layout simulations for 1.1 GHz PLL loop operation has been shown and verified","PeriodicalId":231135,"journal":{"name":"48th Midwest Symposium on Circuits and Systems, 2005.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131150161","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"ECM techniques generator","authors":"M. McGrath, P. Marshall","doi":"10.1117/12.669055","DOIUrl":"https://doi.org/10.1117/12.669055","url":null,"abstract":"The continuous implementation of new and improved electronic counter measure/electronic counter-counter measure (ECM/ECCM) techniques has always been an information technology battle ever since their inception during WWII. The outcomes of various information exploitation experiments are vital in protecting both manned and unmanned airborne platforms. The development of jamming waveforms and ECM techniques are based upon the exploitation data and circuit analysis of various threat hardware and firmware. Unfortunately these current manual methods are very time consuming and nontrivial. Vast resources are allocated just to the setup and investigation/evaluation of a particular system's circuit design. Several very complex information technology exploitation tests must also be executed for the purpose of deriving basis waveforms from the resultant empirical data. Since the results are empirical and not optimized, additional problems may arise at a later date. Consequently, the use of genetic algorithms (GAs) executing inside special signal-processing platforms that are integrated into existing ECM/ECCM testing systems may offer an innovative computational approach/solution in the development of optimized jamming information technology waveforms and techniques. If successful, the time required for developing these techniques could possibly be reduced from years to days if not hours.","PeriodicalId":231135,"journal":{"name":"48th Midwest Symposium on Circuits and Systems, 2005.","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131016072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A MOS high Q active inductor - principle and fundamental characteristics","authors":"T. Adachi, S. Izumiya","doi":"10.1109/MWSCAS.2005.1594230","DOIUrl":"https://doi.org/10.1109/MWSCAS.2005.1594230","url":null,"abstract":"In this paper, we have proposed a new active inductor circuit. This inductor is composed of an inductance generating part and a negative resistance generating part. The inductance generating part is made by an inverting amplifier, a common-source amplifier with capacitor load and a voltage-current converter. The negative resistance generating part is made by a common-source amplifier and a voltage-current converter. The performance of the proposed active inductor has been evaluated by simulation. Inductance up to 10 Henry and Q factor above 1000 have been obtained","PeriodicalId":231135,"journal":{"name":"48th Midwest Symposium on Circuits and Systems, 2005.","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128612775","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
F. Trejo-Macotela, A. Díaz-Sánchez, J. Ramírez-Angulo, J. Martínez-Castillo
{"title":"A low voltage low noise amplifier for radio frequency applications","authors":"F. Trejo-Macotela, A. Díaz-Sánchez, J. Ramírez-Angulo, J. Martínez-Castillo","doi":"10.1109/MWSCAS.2005.1594182","DOIUrl":"https://doi.org/10.1109/MWSCAS.2005.1594182","url":null,"abstract":"In this paper, a low voltage-low noise amplifier is presented. The proposed topology uses a single 1.2V power supply, and has been implemented in a 0.35-mum AMIS CMOS technology. Simulated results of the amplifier showed a noise figure of 1.5dB, a forward gain of 3.5dB with 2.74mW of power consumption. The LNA operates at 2.12GHz, presenting an IIP3 of -15dBm","PeriodicalId":231135,"journal":{"name":"48th Midwest Symposium on Circuits and Systems, 2005.","volume":"136 49","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131747213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Investigation of cross-coupling effects inside a fractional-N frequency synthesiser","authors":"D. Jiang, P. Brennan","doi":"10.1109/MWSCAS.2005.1594357","DOIUrl":"https://doi.org/10.1109/MWSCAS.2005.1594357","url":null,"abstract":"This paper investigates the cross-coupling effects inside a fractional-N frequency synthesiser. The influence of three possible intermodulation points on the synthesiser's noise performance is analysed and simulated based on a linearised PLL model and a synthesiser for the DCS 1800 application. Analytic and simulation results show that the intermodulation at the phase/frequency detector input is the main source of in-band intermodulation spurs","PeriodicalId":231135,"journal":{"name":"48th Midwest Symposium on Circuits and Systems, 2005.","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130451220","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fuzzy current control using current mode WTA-LTA circuits in flexible organic displays","authors":"S. Sambandan, A. Nathan","doi":"10.1109/MWSCAS.2005.1594424","DOIUrl":"https://doi.org/10.1109/MWSCAS.2005.1594424","url":null,"abstract":"Implementation of a pixel calibration technique for organic light emitting diode (OLED) displays using current mode winner-take-all (WTA)/max and loser-take-all (LTA)/min circuits has been presented. The technique estimates the degradation of pixel transconductance with the help of sample pixel representation of the display array","PeriodicalId":231135,"journal":{"name":"48th Midwest Symposium on Circuits and Systems, 2005.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127876730","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ting-Wei Lin, Ming-Chung Lee, Fang-Ju Lin, H. Chiueh
{"title":"A low power ALU cluster design for media streaming architecture","authors":"Ting-Wei Lin, Ming-Chung Lee, Fang-Ju Lin, H. Chiueh","doi":"10.1109/MWSCAS.2005.1594037","DOIUrl":"https://doi.org/10.1109/MWSCAS.2005.1594037","url":null,"abstract":"This paper presented a low power ALU cluster design for media streaming processor, which combines the low-power circuitry design methodology and media streaming architecture. The experimental result shows the power and energy consumption of selected benchmark for multi-media and base-band communication systems can be reduced for 62% and 33% as well. In the mean time, both power dissipation and energy consumption become scalable by dynamic selecting the number of utilized ALU clusters. Thus the instant performance and energy consumption of an entire work can be optimized for mobile systems. The proposed design has provides a breakthrough in the power dissipation and operating time in limited battery life for similar architectures.","PeriodicalId":231135,"journal":{"name":"48th Midwest Symposium on Circuits and Systems, 2005.","volume":"67 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133086644","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A frequency-domain approach to polynomial function based interpolation","authors":"K. Nagasawa, N. Aikawa","doi":"10.1109/MWSCAS.2005.1594030","DOIUrl":"https://doi.org/10.1109/MWSCAS.2005.1594030","url":null,"abstract":"We present a kernel with block structure realized in the Farrow structure form. The design problem of kernel for sampling rate converter using the block structures becomes a nonlinear problem, because the product of the coefficient of the polynomial which constructs each block and the coefficient which determines the ratio of each block need. In this paper, hence, we propose the method for solving the nonlinear problem using an iterative semi-definite programming (SDP). The usefulness of the proposed method and kernel is verified through an example.","PeriodicalId":231135,"journal":{"name":"48th Midwest Symposium on Circuits and Systems, 2005.","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114769537","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. De Jesus-Peregrina, A. Díaz-Sánchez, E. Tlelo-Cuautle
{"title":"Three transistor exponential transconductor","authors":"R. De Jesus-Peregrina, A. Díaz-Sánchez, E. Tlelo-Cuautle","doi":"10.1109/MWSCAS.2005.1594026","DOIUrl":"https://doi.org/10.1109/MWSCAS.2005.1594026","url":null,"abstract":"This work presents a novel exponential transconductor which is formed with only three NMOS transistors working in weak inversion. The circuit is biased with a single current source favoring the design of low voltage circuits and it can have a bias voltage from 1.2V and lower. An important circuit characteristic resides on his high performance output range feature, which is maintained up to 10muA to an input voltage range near of 800mV. Also, the output current preserves a wide region of work up to five decades of current range. Post-layout simulations realized in HSPICE are presented. Process parameters of a 0.5mum AMIs CMOS technology and BSIM3v3 model was employed in the design of the exponential transconductor. The circuit was verified experimentally using CD4007 CMOS transistors arrays, and it agrees faithfully with the presented theoretical study","PeriodicalId":231135,"journal":{"name":"48th Midwest Symposium on Circuits and Systems, 2005.","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129601911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}