Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001最新文献_第2页

Stacking them up: a comparison of virtual machines 将它们堆叠起来:虚拟机的比较

Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001 Pub Date : 2001-01-29 DOI: 10.1109/ACAC.2001.903358

J. Gough

{"title":"Stacking them up: a comparison of virtual machines","authors":"J. Gough","doi":"10.1109/ACAC.2001.903358","DOIUrl":"https://doi.org/10.1109/ACAC.2001.903358","url":null,"abstract":"A popular trend in current software technology is to gain program portability by compiling programs to an intermediate form based on an abstract machine definition. Such approaches date back at least to the 1970s, but have achieved new impetus based on the current popularity of the programming language Java. Implementations of language Java compile programs to bytecodes understood by the Java Virtual Machine (JVM). More recently Microsoft have released preliminary details of their \".NET\" platform, which is based on an abstract machine superficially similar to the JVM. In each case program execution is normally mediated by a just in time compiler (JIT), although in principle interpretative execution is also possible. Although these two competing technologies share some common aims the objectives of the virtual machine designs are significantly different. In particular, the ease with which embedded systems might use small-footprint versions of these virtual machines depends on detailed properties of the machine definitions. In this study, a compiler was implemented which can produce output code that may be run on either the JVM or .NET platforms. The compiler is available in the public domain, and facilitates comparisons to be made both at compile time and at runtime.","PeriodicalId":230403,"journal":{"name":"Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115721481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 49

Two cache lines prediction for a wide-issue micro-architecture 大问题微体系结构的两条缓存线预测

Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001 Pub Date : 2001-01-29 DOI: 10.1109/ACAC.2001.903361

Shu-Lin Hwang, F. Lai

引用次数: 1

A simulator for high speed digital communications 用于高速数字通信的模拟器

Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001 Pub Date : 2001-01-29 DOI: 10.1109/ACAC.2001.903355

E. Fardin, P. Munro, Jarred Scagliotta, John Morris

{"title":"A simulator for high speed digital communications","authors":"E. Fardin, P. Munro, Jarred Scagliotta, John Morris","doi":"10.1109/ACAC.2001.903355","DOIUrl":"https://doi.org/10.1109/ACAC.2001.903355","url":null,"abstract":"Since parallel processors are generally constrained by the available interprocessor data transfer capability, system designers generally try to push interconnection systems to their limits in bandwidth. Practical and economic systems are constrained by many physical and packaging considerations such as a need to use commercially available connectors. We describe here VisiSolve-a simulator that we have built to predict the behaviour of interconnect systems that can readily be assembled from 'off-the-shelf' components. It uses a finite element approach and predicts the dynamic electric field in the cells of the mesh. The irregular geometries of the individual parts of such components require us to adapt the mesh used in simulations in regions where the needs of a practical connector-small size, low insertion force and automatic assembly-have dictated the shape and path of the conductors. We have adopted a method which uses the constitutive error-the discrepancy between electric fields calculated directly and from /spl nabla//spl times/H when H was calculated directly/spl times/as an indicator that refinement is needed.","PeriodicalId":230403,"journal":{"name":"Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130487249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

The first real operating system for reconfigurable computers 第一个真正的可重构计算机操作系统

Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001 Pub Date : 2001-01-29 DOI: 10.1109/ACAC.2001.903375

G. Wigley, D. Kearney

{"title":"The first real operating system for reconfigurable computers","authors":"G. Wigley, D. Kearney","doi":"10.1109/ACAC.2001.903375","DOIUrl":"https://doi.org/10.1109/ACAC.2001.903375","url":null,"abstract":"Traditional reconfigurable computing platforms are designed to be single user and have been acknowledged to be difficult to design applications for. The design tools are still primitive and as reconfigurable computing becomes mainstream the development of new design tools and run time environments is essential. As the number of system gates is reaching 10 million on current FPGAs, there is an increase in demand to share a single FPGA amongst multiple applications. A third party must be introduced to handle the sharing of the FPGA and we therefore introduce the first real single FPGA concurrent multi-user operating system for reconfigurable computers. In this paper we describe the complete operating system for reconfigurable architecture and the implementation details for the first limited multi-user operating system. The first OS is a loader, it allocates FPGA area and it can dynamically partition, place and route applications at run-time. As OS for reconfigurable computing is a new area of research, we also had to develop techniques for regression testing and performance comparison. This involved the development of a test suite.","PeriodicalId":230403,"journal":{"name":"Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127501719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 57

Components + security = OS extensibility 组件+安全性=操作系统的可扩展性

Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001 Pub Date : 2001-01-15 DOI: 10.1109/ACAC.2001.903351

A. Edwards, G. Heiser

引用次数: 9

High-performance extendable instruction set computing 高性能可扩展指令集计算

Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001 Pub Date : 2001-01-15 DOI: 10.1109/ACAC.2001.903365

Heui ran Lee, P. Becket, B. Appelbe

引用次数: 12

Error detection for adaptive computing architectures in spacecraft applications 航天器应用中自适应计算体系结构的错误检测

Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001 Pub Date : 2001-01-15 DOI: 10.1109/ACAC.2001.903349

D. Brodrick, Anwar S. Dawood, N. Bergmann, Melanie Wark

引用次数: 13