Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250)最新文献

Toward supporting data parallel programming on clusters of symmetric multiprocessors 在对称多处理器集群上支持数据并行编程

Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250) Pub Date : 1998-12-14 DOI: 10.1109/ICPADS.1998.741143

Chia-Lien Chiang, Jan-Jan Wu, Nai-Wei Lin

引用次数: 1

On reconfiguring query execution plans in distributed object-relational DBMS 分布式对象-关系DBMS中查询执行计划的重构研究

Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250) Pub Date : 1998-12-14 DOI: 10.1109/ICPADS.1998.741020

K. Ng, Zhenghao Wang, R. Muntz, E. C. Shek

{"title":"On reconfiguring query execution plans in distributed object-relational DBMS","authors":"K. Ng, Zhenghao Wang, R. Muntz, E. C. Shek","doi":"10.1109/ICPADS.1998.741020","DOIUrl":"https://doi.org/10.1109/ICPADS.1998.741020","url":null,"abstract":"Massive database sizes and growing demands for decision support and data mining result in long-running queries in extensible object-relational DBMSs, particularly in decision support and data warehousing analysis applications. Parallelization of query evaluation is often required for acceptable performance, yet queries are frequently processed suboptimally due to (1) only coarse or inaccurate estimates of the query characteristics and database statistics being available prior to query evaluation; (2) changes in system configuration and resource availability during query evaluation. In a distributed environment, dynamically reconfiguring query execution plans (QEPs), which adapts QEPs to the environment as well as to the query characteristics, is a promising means to significantly improve query evaluation performance. Based on an operator classification, we propose an algorithm to coordinate the steps in a reconfiguration and introduce alternatives for execution context checkpointing and restoring. A syntactic extension of SQL to expose the relevant characteristics of user-defined functions in support of dynamic reconfiguration is proposed. An example from the experimental system is presented.","PeriodicalId":226947,"journal":{"name":"Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1998-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114674796","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

A programmable digital neuro-processor design with dynamically reconfigurable pipeline/parallel architecture 具有动态可重构流水线/并行结构的可编程数字神经处理器设计

Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250) Pub Date : 1998-12-14 DOI: 10.1109/ICPADS.1998.741014

Young-Jin Jang, Chan-Ho Park, Hyon-Soo Lee

{"title":"A programmable digital neuro-processor design with dynamically reconfigurable pipeline/parallel architecture","authors":"Young-Jin Jang, Chan-Ho Park, Hyon-Soo Lee","doi":"10.1109/ICPADS.1998.741014","DOIUrl":"https://doi.org/10.1109/ICPADS.1998.741014","url":null,"abstract":"Previous neural network processors were configured either into a SIMD or into an instruction systolic array (ISA) ring architecture using the canonical mapping methodology. The disadvantages of these processors are the lack of generality, scalability, programmability and reconfigurability. So, we propose a programmable neuroprocessor whose architecture is dynamically reconfigurable into either SIMD or an ISA ring according to the data dependencies of any neural network model. To improve the computing time, the computation of an activation function, which typically needed tens of cycles in previous processors, can be done in a single cycle by using piecewise linear (PWL) function approximation. Using a simple bus architecture and instruction set, the proposed processor allows the implementation of neural networks larger than the physical processor element array and allows the user to solve any neural network model. We verify these properties with the error backpropagation (EBP) model and estimate the computation time of the proposed processor.","PeriodicalId":226947,"journal":{"name":"Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1998-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116687561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Detecting the first races in parallel programs with ordered synchronization 用有序同步检测并行程序中的第一个竞争

Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250) Pub Date : 1998-12-14 DOI: 10.1109/ICPADS.1998.741043

Hee-Dong Park, Yong-Kee Jun

引用次数: 12

A cost and performance comparison for wormhole routers based on HDL designs 基于HDL设计的虫洞路由器的成本和性能比较

Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250) Pub Date : 1998-12-14 DOI: 10.1109/ICPADS.1998.741100

T. Yoshinaga, Masaya Hayashi, Maki Horita, Y. Yamaguchi, K. Ootsu, T. Baba

引用次数: 3

Fault tolerant all-to-all broadcast in general interconnection networks

Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250) Pub Date : 1998-12-14 DOI: 10.1109/ICPADS.1998.741050

Yuzhong Sun, P. Cheung, X. Lin, Keqin Li

引用次数: 3

Two problems on butterfly graphs 关于蝴蝶图的两个问题

Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250) Pub Date : 1998-12-14 DOI: 10.1109/ICPADS.1998.741134

Shien-Ching Hwang, Gen-Huey Chen

{"title":"Two problems on butterfly graphs","authors":"Shien-Ching Hwang, Gen-Huey Chen","doi":"10.1109/ICPADS.1998.741134","DOIUrl":"https://doi.org/10.1109/ICPADS.1998.741134","url":null,"abstract":"The cycle partition problem and the pancycle problem on butterfly graphs are studied in this paper. Suppose G=(V,E) is a graph and {V/sub 1/,V/sub 2/,...,V/sub s/} is a partition of V. We say that {V/sub 1/,V/sub 2/,...,V/sub s/} forms a cycle partition of G if each subgraph of G induced by V/sub 1/ contains a cycle of length |V/sub i/|, where 1/spl les/i/spl les/s. A cycle partition {V/sub 1/,V/sub 2/,...,V/sub s/} is /spl lambda/-uniform if |V/sub 1/|=|V/sub 2/|=...=|V/sub s/|=/spl lambda/. G has /spl lambda/-complete uniform cycle partitions if G has m/spl lambda/-uniform cycle partitions for all 1/spl les/m/spl les/(r+n)/2 and m dividing |V|//spl lambda/. Let BF(k,r) denote the r-dimensional k-ary butterfly graph. For the cycle partition problem, we construct a lot of uniform cycle partitions for BF(k,r). Besides, we construct r-complete uniform cycle partitions for BF(2,r), and kr-complete uniform cycle partitions for BF(k,r). For the pancycle problem, given any pair of n and r we can determine if there exists a cycle of length n in BF(2,r), and construct it if it exists. The results of this paper reveal that the butterfly graphs are superior in embedding rings. They can embed rings of almost all possible lengths. Besides, there are many situations in which they can embed the most rings of the same length.","PeriodicalId":226947,"journal":{"name":"Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1998-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116430919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Performance evaluation of cache depot on CC-NUMA multiprocessors CC-NUMA多处理器上缓存库的性能评价

Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250) Pub Date : 1998-12-14 DOI: 10.1109/ICPADS.1998.741127

Hung-Chang Hsiao, C. King

{"title":"Performance evaluation of cache depot on CC-NUMA multiprocessors","authors":"Hung-Chang Hsiao, C. King","doi":"10.1109/ICPADS.1998.741127","DOIUrl":"https://doi.org/10.1109/ICPADS.1998.741127","url":null,"abstract":"Cache depot is a performance enhancement technique on cache-coherent non-uniform memory access (CC-NUMA) multiprocessors, in which nodes in the system store extra memory blocks on behalf of other nodes. In this way memory requests from a node can be satisfied by nearby depot nodes without going all the way to the home node. This not only reduces memory access latency and network traffic, but also spreads the network load more evenly. We study the design strategy for cache depot that: enhances the network interface of each node to include a depot cache, which stores those extra memory blocks for other nodes; and employs a new multicast routing scheme, which is called the multi-hop worms and works cooperatively with depot caches, to transmit coherence messages. By considering message routing and depot caches together the design concept can be applied even to those CC-NUMA systems that have a non-hierarchical, scalable interconnection network. We have developed an execution-driven simulator to evaluate the effectiveness of the design strategy. Performance results from using four SPLASH-2 benchmarks show that the design strategy improves the performance of the CC-NUMA multiprocessor by 11% to 21%. We have also studied in depth various factors which affect the performance of cache depot.","PeriodicalId":226947,"journal":{"name":"Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1998-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122349780","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Object replication using version vector 使用版本向量的对象复制

Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250) Pub Date : 1998-12-14 DOI: 10.1109/ICPADS.1998.741033

K. Hasegawa, H. Higaki, M. Takizawa

引用次数: 8

Incrementally extensible folded hypercube graphs 增量可扩展折叠超立方图

Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250) Pub Date : 1998-12-14 DOI: 10.1109/ICPADS.1998.741133

Hung-Yi Chang, Rong-Jaye Chen

引用次数: 5